diff options
| author | Zou Nan hai <nanhai.zou@intel.com> | 2010-06-25 13:40:24 +0800 |
|---|---|---|
| committer | Eric Anholt <eric@anholt.net> | 2010-08-09 11:28:03 -0700 |
| commit | 1cafd34731cd14e5a72edaf0f41717c8126cfce9 (patch) | |
| tree | 1219b47cb285aeae7cbbf1baa7bdd7918b9c4fde /drivers/gpu/drm/i915/i915_reg.h | |
| parent | e78d73b16bcde921c9cf458d2e4de8e4fc2518f3 (diff) | |
drm/i915 invalidate indirect state pointers at end of ring exec
This is required by the spec, and without this some 3D programs will
hang after resume from RC6 we enable that.
Signed-off-by: Zou Nan hai <nanhai.zou@intel.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_reg.h')
| -rw-r--r-- | drivers/gpu/drm/i915/i915_reg.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 97a35a42da28..21fd657663aa 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -170,6 +170,7 @@ #define MI_NO_WRITE_FLUSH (1 << 2) #define MI_SCENE_COUNT (1 << 3) /* just increment scene count */ #define MI_END_SCENE (1 << 4) /* flush binner and incr scene count */ +#define MI_INVALIDATE_ISP (1 << 5) /* invalidate indirect state pointers */ #define MI_BATCH_BUFFER_END MI_INSTR(0x0a, 0) #define MI_REPORT_HEAD MI_INSTR(0x07, 0) #define MI_OVERLAY_FLIP MI_INSTR(0x11,0) |