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| author | Linus Torvalds <torvalds@linux-foundation.org> | 2010-01-16 10:44:38 -0800 |
|---|---|---|
| committer | Linus Torvalds <torvalds@linux-foundation.org> | 2010-01-16 10:44:38 -0800 |
| commit | 33f724eb9e3d6e33aad410318d3ac720fecbdbcd (patch) | |
| tree | ad0824aec7e1e89276ca4e0b3e63d067f0d34e4c /drivers/gpu/drm/i915/intel_bios.h | |
| parent | 9ddabb6700f82a033a76bcf7a547204fa12aaa17 (diff) | |
| parent | 9b974cc17166d31afed2638d56bdbf9829afbfaa (diff) | |
Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/anholt/drm-intel
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/anholt/drm-intel:
drm/i915: enable 36bit physical address for hardware status page
drm/i915: fix eDP pipe mask
drm/i915: fix pixel color depth setting on eDP
drm/i915: parse eDP panel color depth from VBT block
drm/i915: disable LVDS downclock by default
drm/i915: Fix the incorrect cursor A bit definition in DSPFW2 register
drm/i915: Remove chatty execbuf failure message.
drm/i915: remove loop in Ironlake interrupt handler
drm/i915: Don't wait interruptible for possible plane buffer flush
drm/i915: try another possible DDC bus for the SDVO device with multiple outputs
drm/i915: Read the response after issuing DDC bus switch command
drm/i915: Don't use the child device parsed from VBT to setup HDMI/DP
drm/i915: Fix resume regression on MSI Wind U100 w/o KMS
drm/i915: Fix Ironlake M/N/P ranges to match the spec
drm/i915: Use find_pll function to calculate DPLL setting for LVDS downclock
drm/i915: Add HP nx9020/SamsungSX20S to ACPI LID quirk list
drm/i915: disable TV hotplug status check
Trivial conflicts in drivers/gpu/drm/i915/i915_drv.c due to i915
non-modeset suspend fix with different comment.
Diffstat (limited to 'drivers/gpu/drm/i915/intel_bios.h')
| -rw-r--r-- | drivers/gpu/drm/i915/intel_bios.h | 40 |
1 files changed, 40 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/intel_bios.h b/drivers/gpu/drm/i915/intel_bios.h index 425ac9d7f724..4c18514f6f80 100644 --- a/drivers/gpu/drm/i915/intel_bios.h +++ b/drivers/gpu/drm/i915/intel_bios.h @@ -98,6 +98,7 @@ struct vbios_data { #define BDB_SDVO_LVDS_PNP_IDS 24 #define BDB_SDVO_LVDS_POWER_SEQ 25 #define BDB_TV_OPTIONS 26 +#define BDB_EDP 27 #define BDB_LVDS_OPTIONS 40 #define BDB_LVDS_LFP_DATA_PTRS 41 #define BDB_LVDS_LFP_DATA 42 @@ -426,6 +427,45 @@ struct bdb_driver_features { u8 custom_vbt_version; } __attribute__((packed)); +#define EDP_18BPP 0 +#define EDP_24BPP 1 +#define EDP_30BPP 2 +#define EDP_RATE_1_62 0 +#define EDP_RATE_2_7 1 +#define EDP_LANE_1 0 +#define EDP_LANE_2 1 +#define EDP_LANE_4 3 +#define EDP_PREEMPHASIS_NONE 0 +#define EDP_PREEMPHASIS_3_5dB 1 +#define EDP_PREEMPHASIS_6dB 2 +#define EDP_PREEMPHASIS_9_5dB 3 +#define EDP_VSWING_0_4V 0 +#define EDP_VSWING_0_6V 1 +#define EDP_VSWING_0_8V 2 +#define EDP_VSWING_1_2V 3 + +struct edp_power_seq { + u16 t3; + u16 t7; + u16 t9; + u16 t10; + u16 t12; +} __attribute__ ((packed)); + +struct edp_link_params { + u8 rate:4; + u8 lanes:4; + u8 preemphasis:4; + u8 vswing:4; +} __attribute__ ((packed)); + +struct bdb_edp { + struct edp_power_seq power_seqs[16]; + u32 color_depth; + u32 sdrrs_msa_timing_delay; + struct edp_link_params link_params[16]; +} __attribute__ ((packed)); + bool intel_init_bios(struct drm_device *dev); /* |