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| author | Mark Brown <broonie@kernel.org> | 2014-11-03 15:13:33 +0000 |
|---|---|---|
| committer | Mark Brown <broonie@kernel.org> | 2014-11-03 15:13:33 +0000 |
| commit | ebc01f593b58e1896150fc2e3cbdd0116323c52c (patch) | |
| tree | 23e905a3fdbee3fc8a66ef760b9ed5ef5455e9dd /drivers/gpu/drm/i915/intel_display.c | |
| parent | 3f7256fe5fc64132a2dd19695255c990aa2188cf (diff) | |
| parent | 0df1f2487d2f0d04703f142813d53615d62a1da4 (diff) | |
Merge tag 'v3.18-rc3' into asoc-sgtl5000
Linux 3.18-rc3
Diffstat (limited to 'drivers/gpu/drm/i915/intel_display.c')
| -rw-r--r-- | drivers/gpu/drm/i915/intel_display.c | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index c9e220963a78..f0a1a56406eb 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -4585,7 +4585,7 @@ static void vlv_update_cdclk(struct drm_device *dev) * BSpec erroneously claims we should aim for 4MHz, but * in fact 1MHz is the correct frequency. */ - I915_WRITE(GMBUSFREQ_VLV, dev_priv->vlv_cdclk_freq); + I915_WRITE(GMBUSFREQ_VLV, DIV_ROUND_UP(dev_priv->vlv_cdclk_freq, 1000)); } /* Adjust CDclk dividers to allow high res or save power if possible */ @@ -12885,6 +12885,9 @@ static struct intel_quirk intel_quirks[] = { /* Acer C720 Chromebook (Core i3 4005U) */ { 0x0a16, 0x1025, 0x0a11, quirk_backlight_present }, + /* Apple Macbook 2,1 (Core 2 T7400) */ + { 0x27a2, 0x8086, 0x7270, quirk_backlight_present }, + /* Toshiba CB35 Chromebook (Celeron 2955U) */ { 0x0a06, 0x1179, 0x0a88, quirk_backlight_present }, |