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authorArnd Bergmann <arnd@arndb.de>2012-01-07 11:51:28 +0000
committerArnd Bergmann <arnd@arndb.de>2012-01-07 11:51:28 +0000
commit40ba95fdf158713377d47736b1b3a9d75f4f2515 (patch)
tree17a3216542d1107f777fd82577c91aebbce597d6 /drivers/gpu/drm/i915/intel_panel.c
parent70d84a6431d732cbc4e68e72b6890cdd3865d43d (diff)
parent0575fb754dbfc32a01f297e778533340a533ec68 (diff)
Merge branch 'depends/rmk/restart' into next/cleanup
Conflicts: arch/arm/mach-at91/at91cap9.c arch/arm/mach-at91/at91sam9260.c arch/arm/mach-at91/at91sam9261.c arch/arm/mach-at91/at91sam9263.c arch/arm/mach-at91/at91sam9g45.c arch/arm/mach-at91/at91sam9rl.c arch/arm/mach-exynos/cpu.c arch/arm/mach-shmobile/board-kota2.c This resolves a bunch of conflicts between the arm-soc tree and changes from the arm tree that have gone upstream. Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_panel.c')
-rw-r--r--drivers/gpu/drm/i915/intel_panel.c16
1 files changed, 5 insertions, 11 deletions
diff --git a/drivers/gpu/drm/i915/intel_panel.c b/drivers/gpu/drm/i915/intel_panel.c
index 21f60b7d69a3..04d79fd1dc9d 100644
--- a/drivers/gpu/drm/i915/intel_panel.c
+++ b/drivers/gpu/drm/i915/intel_panel.c
@@ -178,13 +178,10 @@ u32 intel_panel_get_max_backlight(struct drm_device *dev)
if (HAS_PCH_SPLIT(dev)) {
max >>= 16;
} else {
- if (IS_PINEVIEW(dev)) {
+ if (INTEL_INFO(dev)->gen < 4)
max >>= 17;
- } else {
+ else
max >>= 16;
- if (INTEL_INFO(dev)->gen < 4)
- max &= ~1;
- }
if (is_backlight_combination_mode(dev))
max *= 0xff;
@@ -203,13 +200,12 @@ u32 intel_panel_get_backlight(struct drm_device *dev)
val = I915_READ(BLC_PWM_CPU_CTL) & BACKLIGHT_DUTY_CYCLE_MASK;
} else {
val = I915_READ(BLC_PWM_CTL) & BACKLIGHT_DUTY_CYCLE_MASK;
- if (IS_PINEVIEW(dev))
+ if (INTEL_INFO(dev)->gen < 4)
val >>= 1;
if (is_backlight_combination_mode(dev)) {
u8 lbpc;
- val &= ~1;
pci_read_config_byte(dev->pdev, PCI_LBPC, &lbpc);
val *= lbpc;
}
@@ -246,11 +242,9 @@ static void intel_panel_actually_set_backlight(struct drm_device *dev, u32 level
}
tmp = I915_READ(BLC_PWM_CTL);
- if (IS_PINEVIEW(dev)) {
- tmp &= ~(BACKLIGHT_DUTY_CYCLE_MASK - 1);
+ if (INTEL_INFO(dev)->gen < 4)
level <<= 1;
- } else
- tmp &= ~BACKLIGHT_DUTY_CYCLE_MASK;
+ tmp &= ~BACKLIGHT_DUTY_CYCLE_MASK;
I915_WRITE(BLC_PWM_CTL, tmp | level);
}