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authorVille Syrjälä <ville.syrjala@linux.intel.com>2014-05-21 14:04:46 +0300
committerDaniel Vetter <daniel.vetter@ffwll.ch>2014-05-22 15:06:33 +0200
commit46a55d3016083bf43568a6a20ad95567fb79202d (patch)
tree73b9716b13ea7a566e4c58eb65062ba3d5a72ee8 /drivers/gpu/drm/i915/intel_sprite.c
parentd45a0bf549cda7ab77f3ffce6db1b27b7b435316 (diff)
drm/i915: Wait for pending page flips before enabling/disabling the primary plane
We have to write to the primary plane base address registrer when we enable/disable the primary plane in response to sprite coverage. Those writes will cause the flip counter to increment which could interfere with the detection of CS flip completion. We could end up completing CS flips before the CS has even executed the commands from the ring. To avoid such issues, wait for CS flips to finish before we toggle the primary plane on/off. v2: Rebased due to atomic sprite update changes Testcase: igt/kms_mmio_vs_cs_flip/setplane_vs_cs_flip Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by Rodrigo Vivi <rodrigo.vivi@gmail.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_sprite.c')
-rw-r--r--drivers/gpu/drm/i915/intel_sprite.c3
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c
index 7780f6ce73ec..d6acd6bd0bf0 100644
--- a/drivers/gpu/drm/i915/intel_sprite.c
+++ b/drivers/gpu/drm/i915/intel_sprite.c
@@ -1018,6 +1018,9 @@ intel_update_plane(struct drm_plane *plane, struct drm_crtc *crtc,
intel_crtc->primary_enabled = primary_enabled;
+ if (primary_was_enabled != primary_enabled)
+ intel_crtc_wait_for_pending_flips(crtc);
+
if (primary_was_enabled && !primary_enabled)
intel_pre_disable_primary(crtc);