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author | Marcel Ziswiler <marcel.ziswiler@toradex.com> | 2018-12-12 14:08:45 +0100 |
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committer | Marcel Ziswiler <marcel.ziswiler@toradex.com> | 2018-12-12 14:08:45 +0100 |
commit | cfbbc7703fff59c67761c93a8b1de29a79f9841c (patch) | |
tree | 58b4b37bed385b27fc5956435b2451c760f26f5f /drivers/gpu/drm/omapdrm | |
parent | 5f3fecbc0715a70437501e1d85e74726c4f561be (diff) | |
parent | 1aa861ff238ecd17a3095b0dbd2d20bdf7bfaf14 (diff) |
Merge tag 'v4.9.144' into 4.9-2.3.x-imx
This is the 4.9.144 stable release
Diffstat (limited to 'drivers/gpu/drm/omapdrm')
-rw-r--r-- | drivers/gpu/drm/omapdrm/omap_dmm_tiler.c | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/drivers/gpu/drm/omapdrm/omap_dmm_tiler.c b/drivers/gpu/drm/omapdrm/omap_dmm_tiler.c index 7def04049498..6a0b25e0823f 100644 --- a/drivers/gpu/drm/omapdrm/omap_dmm_tiler.c +++ b/drivers/gpu/drm/omapdrm/omap_dmm_tiler.c @@ -273,6 +273,17 @@ static int dmm_txn_commit(struct dmm_txn *txn, bool wait) } txn->last_pat->next_pa = 0; + /* ensure that the written descriptors are visible to DMM */ + wmb(); + + /* + * NOTE: the wmb() above should be enough, but there seems to be a bug + * in OMAP's memory barrier implementation, which in some rare cases may + * cause the writes not to be observable after wmb(). + */ + + /* read back to ensure the data is in RAM */ + readl(&txn->last_pat->next_pa); /* write to PAT_DESCR to clear out any pending transaction */ dmm_write(dmm, 0x0, reg[PAT_DESCR][engine->id]); |