diff options
| author | Liu Ying <victor.liu@nxp.com> | 2017-11-29 14:10:16 +0800 |
|---|---|---|
| committer | Leonard Crestez <leonard.crestez@nxp.com> | 2018-08-24 12:41:33 +0300 |
| commit | ccd8d4cccd0426143db2845fc5a110a255e5b990 (patch) | |
| tree | bcb918bdfbea2f581ba39b0fa66eb2c51fcc92ed /drivers/gpu/drm/panel | |
| parent | ead9cfede68766833c011af3cb7036d61b4bb4cf (diff) | |
MLK-17022 drm/panel: panel-simple: Correct JDI TX26D202VM0BWA panel display timing flags
The JDI TX26D202VM0BWA panel works in data enable(DE) mode.
Apparently, the panel's data enable signal is active high
according to the panel spec. This patch corrects the DE
signal polarity from active low to active high.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
Diffstat (limited to 'drivers/gpu/drm/panel')
| -rw-r--r-- | drivers/gpu/drm/panel/panel-simple.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/panel/panel-simple.c b/drivers/gpu/drm/panel/panel-simple.c index 3dd664d13bff..fd065e5cd97f 100644 --- a/drivers/gpu/drm/panel/panel-simple.c +++ b/drivers/gpu/drm/panel/panel-simple.c @@ -1011,7 +1011,7 @@ static const struct display_timing jdi_tx26d202vm0bwa_timing = { .vfront_porch = { 3, 5, 10 }, .vback_porch = { 2, 5, 10 }, .vsync_len = { 5, 5, 5 }, - .flags = DISPLAY_FLAGS_DE_LOW, + .flags = DISPLAY_FLAGS_DE_HIGH, }; static const struct panel_desc jdi_tx26d202vm0bwa = { |