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authorAlex Deucher <alexander.deucher@amd.com>2012-08-31 10:37:47 -0400
committerAlex Deucher <alexander.deucher@amd.com>2013-06-25 17:50:30 -0400
commitf96ab484578ae813ac0d211bd95aeb8e9424fed2 (patch)
tree90a28738a0e89814ed68bfe132ce3f22bf3d184f /drivers/gpu/drm/radeon/cikd.h
parentfbc832c7f55179e647543f76c9f4b4bdd9c3afcc (diff)
drm/radeon: implement async vm_flush for the CP (v7)
Update the page table base address and flush the VM TLB using the CP. v2: update for 2 level PTs v3: use new packet for invalidate v4: update SH_MEM* regs when flushing the VM v5: add pfp sync, go back to old style vm TLB invalidate v6: fix hdp flush packet count v7: use old style HDP flush Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/radeon/cikd.h')
0 files changed, 0 insertions, 0 deletions