summaryrefslogtreecommitdiff
path: root/drivers/gpu/drm/radeon/r300.c
diff options
context:
space:
mode:
authorLinus Torvalds <torvalds@linux-foundation.org>2009-11-11 11:32:04 -0800
committerLinus Torvalds <torvalds@linux-foundation.org>2009-11-11 11:32:04 -0800
commit6b46362c0ea472b174c336786fd406c504326ad4 (patch)
treef403d941d88ea9e2ee59ec977cb4d6c7b782018d /drivers/gpu/drm/radeon/r300.c
parent961767b75d63c21aa60ee3ccf940288c3c1afde6 (diff)
parenteeba57518c01cf462d87bbfc59049139da47adcb (diff)
Merge branch 'drm-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/airlied/drm-2.6
* 'drm-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/airlied/drm-2.6: (52 commits) drm/kms: Init the CRTC info fields for modes forced from the command line. drm/radeon/r600: CS parser updates drm/radeon/kms: add debugfs for power management for AtomBIOS devices drm/radeon/kms: initial mode validation support drm/radeon/kms/atom/dce3: call transmitter init on mode set drm/radeon/kms: store detailed connector info drm/radeon/kms/atom/dce3: fix up usPixelClock calculation for Transmitter tables drm/radeon/kms/r600: fix rs880 support v2 drm/radeon/kms/r700: fix some typos in chip init drm/radeon/kms: remove some misleading debugging output drm/radeon/kms: stop putting VRAM at 0 in MC space on r600s. drm/radeon/kms: disable D1VGA and D2VGA if enabled drm/radeon/kms: Don't RMW CP_RB_CNTL drm/radeon/kms: fix coherency issues on AGP cards. drm/radeon/kms: fix rc410 suspend/resume. drm/radeon/kms: add quirk for hp dc5750 drm/radeon/kms/atom: fix potential oops in spread spectrum code drm/kms: typo fix drm/radeon/kms/atom: Make card_info per device drm/radeon/kms/atom: Fix DVO support ...
Diffstat (limited to 'drivers/gpu/drm/radeon/r300.c')
-rw-r--r--drivers/gpu/drm/radeon/r300.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/radeon/r300.c b/drivers/gpu/drm/radeon/r300.c
index e08c4a8974ca..2f43ee8e4048 100644
--- a/drivers/gpu/drm/radeon/r300.c
+++ b/drivers/gpu/drm/radeon/r300.c
@@ -113,7 +113,7 @@ int rv370_pcie_gart_enable(struct radeon_device *rdev)
tmp = RADEON_PCIE_TX_GART_UNMAPPED_ACCESS_DISCARD;
WREG32_PCIE(RADEON_PCIE_TX_GART_CNTL, tmp);
WREG32_PCIE(RADEON_PCIE_TX_GART_START_LO, rdev->mc.gtt_location);
- tmp = rdev->mc.gtt_location + rdev->mc.gtt_size - 4096;
+ tmp = rdev->mc.gtt_location + rdev->mc.gtt_size - RADEON_GPU_PAGE_SIZE;
WREG32_PCIE(RADEON_PCIE_TX_GART_END_LO, tmp);
WREG32_PCIE(RADEON_PCIE_TX_GART_START_HI, 0);
WREG32_PCIE(RADEON_PCIE_TX_GART_END_HI, 0);