diff options
| author | Alex Deucher <alexdeucher@gmail.com> | 2011-03-02 20:07:31 -0500 |
|---|---|---|
| committer | Dave Airlie <airlied@redhat.com> | 2011-03-03 11:51:13 +1000 |
| commit | 0c88a02ef6b7e29a811f0d56367cc2268c4ef433 (patch) | |
| tree | d098334ef622adf3845edac3b0e0a1dcf6eb94bd /drivers/gpu/drm/radeon/radeon.h | |
| parent | fa8198eac871edef38e969e2c6a68649e0cd36e0 (diff) | |
drm/radeon/kms: add support for CP setup on cayman asics
Cayman asics have 3 ring buffers:
ring 0 supports both gfx and compute
rings 1 and 2 are compute only
At the moment we only support ring 0.
Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/radeon/radeon.h')
| -rw-r--r-- | drivers/gpu/drm/radeon/radeon.h | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h index 4b77b79fbbc2..4ff28d68a498 100644 --- a/drivers/gpu/drm/radeon/radeon.h +++ b/drivers/gpu/drm/radeon/radeon.h @@ -664,6 +664,8 @@ struct radeon_wb { #define RADEON_WB_SCRATCH_OFFSET 0 #define RADEON_WB_CP_RPTR_OFFSET 1024 +#define RADEON_WB_CP1_RPTR_OFFSET 1280 +#define RADEON_WB_CP2_RPTR_OFFSET 1536 #define R600_WB_IH_WPTR_OFFSET 2048 #define R600_WB_EVENT_OFFSET 3072 @@ -1186,6 +1188,9 @@ struct radeon_device { struct radeon_mman mman; struct radeon_fence_driver fence_drv; struct radeon_cp cp; + /* cayman compute rings */ + struct radeon_cp cp1; + struct radeon_cp cp2; struct radeon_ib_pool ib_pool; struct radeon_irq irq; struct radeon_asic *asic; |