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authorChristian König <deathsimple@vodafone.de>2011-10-13 12:48:45 +0200
committerDave Airlie <airlied@redhat.com>2011-12-20 19:49:56 +0000
commit5596a9db156107b01ceb7db4d50cc091117da627 (patch)
tree93a485ad83c37f28ba4565292bd13492959d72f8 /drivers/gpu/drm/radeon/radeon_asic.h
parent7b1f2485db253aaa0081e1c5213533e166130732 (diff)
drm/radeon: make ring rptr and wptr register offsets variable
Every ring seems to have the concept of read and write pointers. Make the register offset variable so we can use the functions for different types of rings. Signed-off-by: Christian König <deathsimple@vodafone.de> Reviewed-by: Jerome Glisse <jglisse@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/radeon/radeon_asic.h')
-rw-r--r--drivers/gpu/drm/radeon/radeon_asic.h2
1 files changed, 0 insertions, 2 deletions
diff --git a/drivers/gpu/drm/radeon/radeon_asic.h b/drivers/gpu/drm/radeon/radeon_asic.h
index 4f8447557298..4f9ba6d0330f 100644
--- a/drivers/gpu/drm/radeon/radeon_asic.h
+++ b/drivers/gpu/drm/radeon/radeon_asic.h
@@ -63,7 +63,6 @@ int r100_asic_reset(struct radeon_device *rdev);
u32 r100_get_vblank_counter(struct radeon_device *rdev, int crtc);
void r100_pci_gart_tlb_flush(struct radeon_device *rdev);
int r100_pci_gart_set_page(struct radeon_device *rdev, int i, uint64_t addr);
-void r100_cp_commit(struct radeon_device *rdev, struct radeon_cp *cp);
void r100_ring_start(struct radeon_device *rdev);
int r100_irq_set(struct radeon_device *rdev);
int r100_irq_process(struct radeon_device *rdev);
@@ -297,7 +296,6 @@ int r600_resume(struct radeon_device *rdev);
void r600_vga_set_state(struct radeon_device *rdev, bool state);
int r600_wb_init(struct radeon_device *rdev);
void r600_wb_fini(struct radeon_device *rdev);
-void r600_cp_commit(struct radeon_device *rdev, struct radeon_cp *cp);
void r600_pcie_gart_tlb_flush(struct radeon_device *rdev);
uint32_t r600_pciep_rreg(struct radeon_device *rdev, uint32_t reg);
void r600_pciep_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v);