diff options
author | Ajay Nandakumar <anandakumarm@nvidia.com> | 2013-10-31 07:12:36 +0530 |
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committer | Ajay Nandakumar <anandakumarm@nvidia.com> | 2013-10-31 07:12:36 +0530 |
commit | 639f4bc6c2e711e814f72805d07412f93a9fbd89 (patch) | |
tree | 5a57a019d16c351d8f4a75eabb43ee4e6d740e57 /drivers/gpu/drm/radeon/rs400.c | |
parent | 2611486c29791d083a6a58bb88a23de042d38031 (diff) | |
parent | 14e9c7db465387ede7f019c42f28c90f99fc2793 (diff) |
Merge tag 'v3.10.17' into dev-kernel-3.10
This is the 3.10.17 stable release
Conflicts:
drivers/usb/host/xhci.c
Change-Id: I6bd3b15ff92a0b94568b9d02e9bb1036becfca20
Diffstat (limited to 'drivers/gpu/drm/radeon/rs400.c')
-rw-r--r-- | drivers/gpu/drm/radeon/rs400.c | 9 |
1 files changed, 6 insertions, 3 deletions
diff --git a/drivers/gpu/drm/radeon/rs400.c b/drivers/gpu/drm/radeon/rs400.c index 233a9b9fa1f7..b8074a8ec75a 100644 --- a/drivers/gpu/drm/radeon/rs400.c +++ b/drivers/gpu/drm/radeon/rs400.c @@ -174,10 +174,13 @@ int rs400_gart_enable(struct radeon_device *rdev) /* FIXME: according to doc we should set HIDE_MMCFG_BAR=0, * AGPMODE30=0 & AGP30ENHANCED=0 in NB_CNTL */ if ((rdev->family == CHIP_RS690) || (rdev->family == CHIP_RS740)) { - WREG32_MC(RS480_MC_MISC_CNTL, - (RS480_GART_INDEX_REG_EN | RS690_BLOCK_GFX_D3_EN)); + tmp = RREG32_MC(RS480_MC_MISC_CNTL); + tmp |= RS480_GART_INDEX_REG_EN | RS690_BLOCK_GFX_D3_EN; + WREG32_MC(RS480_MC_MISC_CNTL, tmp); } else { - WREG32_MC(RS480_MC_MISC_CNTL, RS480_GART_INDEX_REG_EN); + tmp = RREG32_MC(RS480_MC_MISC_CNTL); + tmp |= RS480_GART_INDEX_REG_EN; + WREG32_MC(RS480_MC_MISC_CNTL, tmp); } /* Enable gart */ WREG32_MC(RS480_AGP_ADDRESS_SPACE_SIZE, (RS480_GART_EN | size_reg)); |