diff options
author | Takashi Iwai <tiwai@suse.de> | 2013-08-23 14:12:22 +0200 |
---|---|---|
committer | Takashi Iwai <tiwai@suse.de> | 2013-08-23 14:12:22 +0200 |
commit | 68538bf2bce557c3b5fe8c59b034d45352500db1 (patch) | |
tree | a84b68990cadcbfc277acc7b7f2b75716750e203 /drivers/gpu/drm/radeon/rs780_dpm.c | |
parent | a8cc20999799a94929a56393ff39b32245e33d64 (diff) | |
parent | 43bcb402f84fe459102120b4e2d28d7117f16cd0 (diff) |
Merge tag 'asoc-v3.12' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound into for-next
ASoC: Updates for v3.12
- DAPM is now mandatory for CODEC drivers in order to avoid the repeated
regressions in the special cases for non-DAPM CODECs and make it
easier to integrate with other components on boards. All existing
drivers have had some level of DAPM support added.
- A lot of cleanups in DAPM plus support for maintaining controls in a
specific state while a DAPM widget all contributed by Lars-Peter Clausen.
- Core helpers for bitbanged AC'97 reset from Markus Pargmann.
- New drivers and support for Analog Devices ADAU1702 and ADAU1401(a),
Asahi Kasei Microdevices AK4554, Atmel AT91ASM9x5 and WM8904 based
machines, Freescale S/PDIF and SSI AC'97, Renesas R-Car SoCs, Samsung
Exynos5420 SoCs, Texas Instruments PCM1681 and PCM1792A and Wolfson
Microelectronics WM8997.
- Support for building drivers that can support it cross-platform for
compile test.
Diffstat (limited to 'drivers/gpu/drm/radeon/rs780_dpm.c')
-rw-r--r-- | drivers/gpu/drm/radeon/rs780_dpm.c | 25 |
1 files changed, 25 insertions, 0 deletions
diff --git a/drivers/gpu/drm/radeon/rs780_dpm.c b/drivers/gpu/drm/radeon/rs780_dpm.c index bef832a62fee..d1a1ce73bd45 100644 --- a/drivers/gpu/drm/radeon/rs780_dpm.c +++ b/drivers/gpu/drm/radeon/rs780_dpm.c @@ -28,6 +28,7 @@ #include "r600_dpm.h" #include "rs780_dpm.h" #include "atom.h" +#include <linux/seq_file.h> static struct igp_ps *rs780_get_ps(struct radeon_ps *rps) { @@ -961,3 +962,27 @@ u32 rs780_dpm_get_mclk(struct radeon_device *rdev, bool low) return pi->bootup_uma_clk; } + +void rs780_dpm_debugfs_print_current_performance_level(struct radeon_device *rdev, + struct seq_file *m) +{ + struct radeon_ps *rps = rdev->pm.dpm.current_ps; + struct igp_ps *ps = rs780_get_ps(rps); + u32 current_fb_div = RREG32(FVTHROT_STATUS_REG0) & CURRENT_FEEDBACK_DIV_MASK; + u32 func_cntl = RREG32(CG_SPLL_FUNC_CNTL); + u32 ref_div = ((func_cntl & SPLL_REF_DIV_MASK) >> SPLL_REF_DIV_SHIFT) + 1; + u32 post_div = ((func_cntl & SPLL_SW_HILEN_MASK) >> SPLL_SW_HILEN_SHIFT) + 1 + + ((func_cntl & SPLL_SW_LOLEN_MASK) >> SPLL_SW_LOLEN_SHIFT) + 1; + u32 sclk = (rdev->clock.spll.reference_freq * current_fb_div) / + (post_div * ref_div); + + seq_printf(m, "uvd vclk: %d dclk: %d\n", rps->vclk, rps->dclk); + + /* guess based on the current sclk */ + if (sclk < (ps->sclk_low + 500)) + seq_printf(m, "power level 0 sclk: %u vddc_index: %d\n", + ps->sclk_low, ps->min_voltage); + else + seq_printf(m, "power level 1 sclk: %u vddc_index: %d\n", + ps->sclk_high, ps->max_voltage); +} |