diff options
| author | Alex Deucher <alexander.deucher@amd.com> | 2013-06-26 00:35:16 -0400 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2013-06-27 19:15:47 -0400 |
| commit | f85392bcf94c5ae8bf55852827dcfa46f86502dc (patch) | |
| tree | 3d1b8cbcc56df441394d668c1f731e803fbcfbd2 /drivers/gpu/drm/radeon/rv770_dpm.c | |
| parent | 7c464f68b361aa05f964e22f7a8be4e7a7698a70 (diff) | |
drm/radeon: add dpm UVD handling for evergreen/btc asics
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/radeon/rv770_dpm.c')
| -rw-r--r-- | drivers/gpu/drm/radeon/rv770_dpm.c | 30 |
1 files changed, 17 insertions, 13 deletions
diff --git a/drivers/gpu/drm/radeon/rv770_dpm.c b/drivers/gpu/drm/radeon/rv770_dpm.c index 8cdad4fe3b8f..75062c4f113d 100644 --- a/drivers/gpu/drm/radeon/rv770_dpm.c +++ b/drivers/gpu/drm/radeon/rv770_dpm.c @@ -265,22 +265,21 @@ int rv770_populate_smc_t(struct radeon_device *rdev, l[0] = 0; r[2] = 100; - a_n = (int)state->medium.sclk * RV770_LMP_DFLT + - (int)state->low.sclk * (R600_AH_DFLT - RV770_RLP_DFLT); - a_d = (int)state->low.sclk * (100 - (int)RV770_RLP_DFLT) + - (int)state->medium.sclk * RV770_LMP_DFLT; + a_n = (int)state->medium.sclk * pi->lmp + + (int)state->low.sclk * (R600_AH_DFLT - pi->rlp); + a_d = (int)state->low.sclk * (100 - (int)pi->rlp) + + (int)state->medium.sclk * pi->lmp; - l[1] = (u8)(RV770_LMP_DFLT - (int)RV770_LMP_DFLT * a_n / a_d); - r[0] = (u8)(RV770_RLP_DFLT + (100 - (int)RV770_RLP_DFLT) * a_n / a_d); + l[1] = (u8)(pi->lmp - (int)pi->lmp * a_n / a_d); + r[0] = (u8)(pi->rlp + (100 - (int)pi->rlp) * a_n / a_d); - a_n = (int)state->high.sclk * RV770_LHP_DFLT + - (int)state->medium.sclk * - (R600_AH_DFLT - RV770_RMP_DFLT); - a_d = (int)state->medium.sclk * (100 - (int)RV770_RMP_DFLT) + - (int)state->high.sclk * RV770_LHP_DFLT; + a_n = (int)state->high.sclk * pi->lhp + (int)state->medium.sclk * + (R600_AH_DFLT - pi->rmp); + a_d = (int)state->medium.sclk * (100 - (int)pi->rmp) + + (int)state->high.sclk * pi->lhp; - l[2] = (u8)(RV770_LHP_DFLT - (int)RV770_LHP_DFLT * a_n / a_d); - r[1] = (u8)(RV770_RMP_DFLT + (100 - (int)RV770_RMP_DFLT) * a_n / a_d); + l[2] = (u8)(pi->lhp - (int)pi->lhp * a_n / a_d); + r[1] = (u8)(pi->rmp + (100 - (int)pi->rmp) * a_n / a_d); for (i = 0; i < (RV770_SMC_PERFORMANCE_LEVELS_PER_SWSTATE - 1); i++) { a_t = CG_R(r[i] * pi->bsp / 200) | CG_L(l[i] * pi->bsp / 200); @@ -2281,6 +2280,11 @@ int rv770_dpm_init(struct radeon_device *rdev) pi->mclk_strobe_mode_threshold = 30000; pi->mclk_edc_enable_threshold = 30000; + pi->rlp = RV770_RLP_DFLT; + pi->rmp = RV770_RMP_DFLT; + pi->lhp = RV770_LHP_DFLT; + pi->lmp = RV770_LMP_DFLT; + pi->voltage_control = radeon_atom_is_voltage_gpio(rdev, SET_VOLTAGE_TYPE_ASIC_VDDC); |