diff options
| author | Alex Deucher <alexander.deucher@amd.com> | 2014-06-06 18:43:45 -0400 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2014-08-05 08:53:21 -0400 |
| commit | 636e2582658742b94e7620becce58f939996c961 (patch) | |
| tree | 6299d819263106f81d9902cf3b6d4445e0d8ae79 /drivers/gpu/drm/radeon/si_dpm.h | |
| parent | a91576d7916f6cce76d30303e60e1ac47cf4a76d (diff) | |
drm/radeon/dpm: add support for SVI2 voltage for SI
Some newer boards use SVI2 for voltage control rather
than GPIO.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/radeon/si_dpm.h')
| -rw-r--r-- | drivers/gpu/drm/radeon/si_dpm.h | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/drivers/gpu/drm/radeon/si_dpm.h b/drivers/gpu/drm/radeon/si_dpm.h index 4ce5032cdf49..8b5c06a0832d 100644 --- a/drivers/gpu/drm/radeon/si_dpm.h +++ b/drivers/gpu/drm/radeon/si_dpm.h @@ -170,6 +170,8 @@ struct si_power_info { bool vddc_phase_shed_control; bool pspp_notify_required; bool sclk_deep_sleep_above_low; + bool voltage_control_svi2; + bool vddci_control_svi2; /* smc offsets */ u32 sram_end; u32 state_table_start; @@ -192,6 +194,9 @@ struct si_power_info { SMC_SIslands_MCRegisters smc_mc_reg_table; SISLANDS_SMC_STATETABLE smc_statetable; PP_SIslands_PAPMParameters papm_parm; + /* SVI2 */ + u8 svd_gpio_id; + u8 svc_gpio_id; }; #define SISLANDS_INITIAL_STATE_ARB_INDEX 0 |