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authorstu.hsieh@mediatek.com <stu.hsieh@mediatek.com>2018-06-20 16:19:21 +0800
committerCK Hu <ck.hu@mediatek.com>2018-06-24 12:06:30 +0800
commit15484ae0afa9286f166bdb64a97700f215ada956 (patch)
treecf4b534827ea17fde855a9709bce18dea2757c34 /drivers/gpu/drm
parent5346010f72226c38de987c366fdf81cb313679ef (diff)
drm/mediatek: add connection from RDMA1 to DSI3
This patch add the connection from RDMA1 to DSI3 Signed-off-by: Stu Hsieh <stu.hsieh@mediatek.com> Signed-off-by: CK Hu <ck.hu@mediatek.com>
Diffstat (limited to 'drivers/gpu/drm')
-rw-r--r--drivers/gpu/drm/mediatek/mtk_drm_ddp.c8
1 files changed, 8 insertions, 0 deletions
diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp.c b/drivers/gpu/drm/mediatek/mtk_drm_ddp.c
index 9cf2fcb4932a..d0d5f337ce14 100644
--- a/drivers/gpu/drm/mediatek/mtk_drm_ddp.c
+++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp.c
@@ -90,10 +90,12 @@
#define RDMA1_SOUT_DPI1 0x3
#define RDMA1_SOUT_DSI1 0x1
#define RDMA1_SOUT_DSI2 0x4
+#define RDMA1_SOUT_DSI3 0x5
#define DPI0_SEL_IN_RDMA1 0x1
#define DPI1_SEL_IN_RDMA1 (0x1 << 8)
#define DSI1_SEL_IN_RDMA1 0x1
#define DSI2_SEL_IN_RDMA1 (0x1 << 16)
+#define DSI3_SEL_IN_RDMA1 (0x1 << 16)
#define COLOR1_SEL_IN_OVL1 0x1
#define OVL_MOUT_EN_RDMA 0x1
@@ -182,6 +184,9 @@ static unsigned int mtk_ddp_mout_en(enum mtk_ddp_comp_id cur,
} else if (cur == DDP_COMPONENT_RDMA1 && next == DDP_COMPONENT_DSI2) {
*addr = DISP_REG_CONFIG_DISP_RDMA1_SOUT_EN;
value = RDMA1_SOUT_DSI2;
+ } else if (cur == DDP_COMPONENT_RDMA1 && next == DDP_COMPONENT_DSI3) {
+ *addr = DISP_REG_CONFIG_DISP_RDMA1_SOUT_EN;
+ value = RDMA1_SOUT_DSI3;
} else if (cur == DDP_COMPONENT_RDMA1 && next == DDP_COMPONENT_DPI0) {
*addr = DISP_REG_CONFIG_DISP_RDMA1_SOUT_EN;
value = RDMA1_SOUT_DPI0;
@@ -216,6 +221,9 @@ static unsigned int mtk_ddp_sel_in(enum mtk_ddp_comp_id cur,
} else if (cur == DDP_COMPONENT_RDMA1 && next == DDP_COMPONENT_DSI2) {
*addr = DISP_REG_CONFIG_DSIE_SEL_IN;
value = DSI2_SEL_IN_RDMA1;
+ } else if (cur == DDP_COMPONENT_RDMA1 && next == DDP_COMPONENT_DSI3) {
+ *addr = DISP_REG_CONFIG_DSIO_SEL_IN;
+ value = DSI3_SEL_IN_RDMA1;
} else if (cur == DDP_COMPONENT_OVL1 && next == DDP_COMPONENT_COLOR1) {
*addr = DISP_REG_CONFIG_DISP_COLOR1_SEL_IN;
value = COLOR1_SEL_IN_OVL1;