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authorYuchou Gan <yuchou.gan@nxp.com>2018-05-11 23:47:36 +0800
committerLeonard Crestez <leonard.crestez@nxp.com>2018-08-24 12:41:33 +0300
commitd46bf3c2951abc2cc2b988ed728a6e2ba7d2624b (patch)
tree13203a752cdb84700fe5d675673250a8c868f607 /drivers/gpu/imx
parent63f4f27c94db741a649ed81aa4f05ff5a948552e (diff)
MLK-18283-2 gpu: imx: imx8_dprc: Align the dprc width to smaller size
As to super-tiled format for blit engine, the dprc width should aligned to smaller size instead of 64. Signed-off-by: Yuchou Gan <yuchou.gan@nxp.com>
Diffstat (limited to 'drivers/gpu/imx')
-rw-r--r--drivers/gpu/imx/imx8_dprc.c6
1 files changed, 5 insertions, 1 deletions
diff --git a/drivers/gpu/imx/imx8_dprc.c b/drivers/gpu/imx/imx8_dprc.c
index 7136721a4a76..cf9be7e130f9 100644
--- a/drivers/gpu/imx/imx8_dprc.c
+++ b/drivers/gpu/imx/imx8_dprc.c
@@ -445,7 +445,11 @@ void dprc_configure(struct dprc *dprc, unsigned int stream_id,
p1_w = round_up(dprc_width, info->cpp[0] == 2 ? 8 : 4);
break;
case DRM_FORMAT_MOD_VIVANTE_SUPER_TILED:
- p1_w = round_up(dprc_width, 64);
+ if (dprc->is_blit_chan && dprc->devtype->has_fixup)
+ p1_w = round_up(dprc_width,
+ info->cpp[0] == 2 ? 8 : 4);
+ else
+ p1_w = round_up(dprc_width, 64);
break;
default:
p1_w = round_up(dprc_width,