MGS-4051 gpu: imx: dpu-blit: fix suspend resume issue

suspend & resume will destory and recreate blitter,
reset dprc start flags in blitter initialization.

Signed-off-by: Xianzhong <xianzhong.li@nxp.com>

2 files changed, 21 insertions, 13 deletions

diff --git a/drivers/gpu/imx/dpu-blit/dpu-blit.c b/drivers/gpu/imx/dpu-blit/dpu-blit.c
index 60377f406e8a..620d53217719 100644
--- a/drivers/gpu/imx/dpu-blit/dpu-blit.c
+++ b/drivers/gpu/imx/dpu-blit/dpu-blit.c
@@ -107,8 +107,6 @@ void dpu_be_configure_prefetch(struct dpu_bliteng *dpu_be,
 			       u32 stride, u32 format, u64 modifier,
 			       u64 baddr, u64 uv_addr)
 {
-	static bool start = true;
-	static bool need_handle_start;
 	struct dprc *dprc;
 
 	/* Enable DPR, dprc1 is connected to plane0 */
@@ -119,22 +117,22 @@ void dpu_be_configure_prefetch(struct dpu_bliteng *dpu_be,
 	 * 1. tile work with dprc/prg (baddr)
 	 * 2. switch tile to linear (!start)
 	 */
-	if (!start || baddr) {
+	if (!dpu_be->start || baddr) {
 		dpu_be_wait(dpu_be);
 	}
 
 	if (baddr == 0x0) {
-		if (!start) {
+		if (!dpu_be->start) {
 			dprc_disable(dprc);
-			need_handle_start = false;
+			dpu_be->handle_start = false;
 		}
-		start = true;
+		dpu_be->start = true;
 		return;
 	}
 
-	if (need_handle_start) {
+	if (dpu_be->handle_start) {
 		dprc_first_frame_handle(dprc);
-		need_handle_start = false;
+		dpu_be->handle_start = false;
 	}
 
 	dprc_configure(dprc, 0,
@@ -142,17 +140,18 @@ void dpu_be_configure_prefetch(struct dpu_bliteng *dpu_be,
 		       x_offset, y_offset,
 		       stride, format, modifier,
 		       baddr, uv_addr,
-		       start, start,
+		       dpu_be->start,
+		       dpu_be->start,
 		       false);
 
-	if (start) {
+	if (dpu_be->start) {
 		dprc_enable(dprc);
-		need_handle_start = true;
+		dpu_be->handle_start = true;
 	}
 
 	dprc_reg_update(dprc);
 
-	start = false;
+	dpu_be->start = false;
 }
 EXPORT_SYMBOL(dpu_be_configure_prefetch);
 
@@ -411,6 +410,12 @@ int dpu_bliteng_init(struct dpu_bliteng *dpu_bliteng)
 	dpu_bliteng->dprc[0] = dpu_be_dprc_get(dpu, 0);
 	dpu_bliteng->dprc[1] = dpu_be_dprc_get(dpu, 1);
 
+	dprc_disable(dpu_bliteng->dprc[0]);
+	dprc_disable(dpu_bliteng->dprc[1]);
+
+	dpu_bliteng->handle_start = false;
+	dpu_bliteng->start = true;
+
 	return 0;
 }
 EXPORT_SYMBOL_GPL(dpu_bliteng_init);
diff --git a/drivers/gpu/imx/dpu-blit/dpu-blit.h b/drivers/gpu/imx/dpu-blit/dpu-blit.h
index 68ce412aa293..28509338ca0b 100644
--- a/drivers/gpu/imx/dpu-blit/dpu-blit.h
+++ b/drivers/gpu/imx/dpu-blit/dpu-blit.h
@@ -1,6 +1,6 @@
 /*
  * Copyright (C) 2016 Freescale Semiconductor, Inc.
- * Copyright 2017 NXP
+ * Copyright 2017-2018 NXP
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of the GNU General Public License as published by the
@@ -38,6 +38,9 @@ struct dpu_bliteng {
 	struct dpu_soc *dpu;
 
 	struct dprc *dprc[2];
+
+	bool handle_start;
+	bool start;
 };
 
 #endif