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authorYuchou Gan <yuchou.gan@nxp.com>2018-05-26 00:17:55 +0800
committerLeonard Crestez <leonard.crestez@nxp.com>2018-08-24 12:41:33 +0300
commit2143bf17f4fa70fd20986788091ac8fd3dedf80e (patch)
tree4e439ed0481c3b432903502a097ba590bd33fdab /drivers/gpu/imx
parent35e90b28412635790274a7ea476d4bb3dbcda065 (diff)
MLK-18398 gpu: imx: imx8_dprc: dpu-blit: Wait the dprc idle before disable it
For linear and tiled mixed blit, wait the dprc idle before disable it in linear blit. Signed-off-by: Yuchou Gan <yuchou.gan@nxp.com>
Diffstat (limited to 'drivers/gpu/imx')
-rw-r--r--drivers/gpu/imx/dpu-blit/dpu-blit.c16
1 files changed, 13 insertions, 3 deletions
diff --git a/drivers/gpu/imx/dpu-blit/dpu-blit.c b/drivers/gpu/imx/dpu-blit/dpu-blit.c
index ef7162a6dbfa..7df60e0cb8bc 100644
--- a/drivers/gpu/imx/dpu-blit/dpu-blit.c
+++ b/drivers/gpu/imx/dpu-blit/dpu-blit.c
@@ -110,19 +110,29 @@ void dpu_be_configure_prefetch(struct dpu_bliteng *dpu_be,
static bool start = true;
static bool need_handle_start;
struct dprc *dprc;
+ static bool tiled_work_unfinished = true;
/* Enable DPR, dprc1 is connected to plane0 */
dprc = dpu_be->dprc[1];
+ /*
+ * Waiting for the previous tiled command finished
+ * before disable the dpr.
+ */
+ if (tiled_work_unfinished) {
+ dpu_be_wait(dpu_be);
+ dpu_cs_wait_idle(dpu_be);
+ udelay(10);
+ tiled_work_unfinished = false;
+ }
+
if (baddr == 0x0) {
dprc_disable(dprc);
start = true;
return;
}
- dpu_be_wait(dpu_be);
- dpu_cs_wait_idle(dpu_be);
- udelay(10);
+ tiled_work_unfinished = true;
if (need_handle_start) {
dprc_first_frame_handle(dprc);