diff options
author | Steve Longerbeam <slongerbeam@gmail.com> | 2014-06-25 18:05:45 -0700 |
---|---|---|
committer | Philipp Zabel <p.zabel@pengutronix.de> | 2014-09-02 14:55:51 +0200 |
commit | 4fd1a07af59bf5e1cfb73f7035bf525522cebc76 (patch) | |
tree | 43246e0bdd5becad59021d39504fef7429621c31 /drivers/gpu/ipu-v3 | |
parent | 2bcf577eb6361827f8347529803528031033cb83 (diff) |
gpu: ipu-v3: Add ipu_idmac_lock_enable()
Adds ipu_idmac_lock_enable(), which enables or disables channel
burst locking.
Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Diffstat (limited to 'drivers/gpu/ipu-v3')
-rw-r--r-- | drivers/gpu/ipu-v3/ipu-common.c | 69 |
1 files changed, 69 insertions, 0 deletions
diff --git a/drivers/gpu/ipu-v3/ipu-common.c b/drivers/gpu/ipu-v3/ipu-common.c index 0a02465ba102..28be7415a198 100644 --- a/drivers/gpu/ipu-v3/ipu-common.c +++ b/drivers/gpu/ipu-v3/ipu-common.c @@ -305,6 +305,75 @@ void ipu_idmac_set_double_buffer(struct ipuv3_channel *channel, } EXPORT_SYMBOL_GPL(ipu_idmac_set_double_buffer); +static const struct { + int chnum; + u32 reg; + int shift; +} idmac_lock_en_info[] = { + { .chnum = 5, .reg = IDMAC_CH_LOCK_EN_1, .shift = 0, }, + { .chnum = 11, .reg = IDMAC_CH_LOCK_EN_1, .shift = 2, }, + { .chnum = 12, .reg = IDMAC_CH_LOCK_EN_1, .shift = 4, }, + { .chnum = 14, .reg = IDMAC_CH_LOCK_EN_1, .shift = 6, }, + { .chnum = 15, .reg = IDMAC_CH_LOCK_EN_1, .shift = 8, }, + { .chnum = 20, .reg = IDMAC_CH_LOCK_EN_1, .shift = 10, }, + { .chnum = 21, .reg = IDMAC_CH_LOCK_EN_1, .shift = 12, }, + { .chnum = 22, .reg = IDMAC_CH_LOCK_EN_1, .shift = 14, }, + { .chnum = 23, .reg = IDMAC_CH_LOCK_EN_1, .shift = 16, }, + { .chnum = 27, .reg = IDMAC_CH_LOCK_EN_1, .shift = 18, }, + { .chnum = 28, .reg = IDMAC_CH_LOCK_EN_1, .shift = 20, }, + { .chnum = 45, .reg = IDMAC_CH_LOCK_EN_2, .shift = 0, }, + { .chnum = 46, .reg = IDMAC_CH_LOCK_EN_2, .shift = 2, }, + { .chnum = 47, .reg = IDMAC_CH_LOCK_EN_2, .shift = 4, }, + { .chnum = 48, .reg = IDMAC_CH_LOCK_EN_2, .shift = 6, }, + { .chnum = 49, .reg = IDMAC_CH_LOCK_EN_2, .shift = 8, }, + { .chnum = 50, .reg = IDMAC_CH_LOCK_EN_2, .shift = 10, }, +}; + +int ipu_idmac_lock_enable(struct ipuv3_channel *channel, int num_bursts) +{ + struct ipu_soc *ipu = channel->ipu; + unsigned long flags; + u32 bursts, regval; + int i; + + switch (num_bursts) { + case 0: + case 1: + bursts = 0x00; /* locking disabled */ + break; + case 2: + bursts = 0x01; + break; + case 4: + bursts = 0x02; + break; + case 8: + bursts = 0x03; + break; + default: + return -EINVAL; + } + + for (i = 0; i < ARRAY_SIZE(idmac_lock_en_info); i++) { + if (channel->num == idmac_lock_en_info[i].chnum) + break; + } + if (i >= ARRAY_SIZE(idmac_lock_en_info)) + return -EINVAL; + + spin_lock_irqsave(&ipu->lock, flags); + + regval = ipu_idmac_read(ipu, idmac_lock_en_info[i].reg); + regval &= ~(0x03 << idmac_lock_en_info[i].shift); + regval |= (bursts << idmac_lock_en_info[i].shift); + ipu_idmac_write(ipu, regval, idmac_lock_en_info[i].reg); + + spin_unlock_irqrestore(&ipu->lock, flags); + + return 0; +} +EXPORT_SYMBOL_GPL(ipu_idmac_lock_enable); + int ipu_module_enable(struct ipu_soc *ipu, u32 mask) { unsigned long lock_flags; |