diff options
| author | Santosh Katvate <skatvate@nvidia.com> | 2014-04-19 00:31:09 +0530 |
|---|---|---|
| committer | Riham Haidar <rhaidar@nvidia.com> | 2014-05-12 16:34:20 -0700 |
| commit | 223d7bdd76b73da29e0bd05ef1455d59ea19216c (patch) | |
| tree | 474fadd31e1ba1fc642e7c5d3a53753b0e90a777 /drivers/gpu | |
| parent | d41619884095842eb7a1a70369a29eb62e9168e7 (diff) | |
video: tegra: gk20a: Disable gfx before save zbc
This change disables gr engine before calling into pmu
for saving zbc and re-enables once it is finished.
Looks like NV_PPWR_PMU_BAR0_FECS_ERROR_CODE_PRI_TIMEOUT
error during access of NV_PLTCG_LTCS_LTSS_DSTG_ZBC_COLOR_CLEAR_VALUE
happens because of active concurrent memory traffic.
Bug 1489850
Change-Id: I60eacd718480a296f5a46438e18a519c7457f58a
Signed-off-by: Santosh Katvate <skatvate@nvidia.com>
Reviewed-on: http://git-master/r/398398
GVS: Gerrit_Virtual_Submit
(cherry picked from commit 42931088a3a1944359be61ebe39c646b41f73ee6)
Reviewed-on: http://git-master/r/402779
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Mitch Luban <mluban@nvidia.com>
Diffstat (limited to 'drivers/gpu')
| -rw-r--r-- | drivers/gpu/nvgpu/gk20a/gr_gk20a.c | 38 |
1 files changed, 37 insertions, 1 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c index b2a92f814535..08309f0f4ada 100644 --- a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c @@ -3518,6 +3518,42 @@ clean_up: return ret; } +static void gr_gk20a_pmu_save_zbc(struct gk20a *g, u32 entries) +{ + struct fifo_gk20a *f = &g->fifo; + struct fifo_engine_info_gk20a *gr_info = + f->engine_info + ENGINE_GR_GK20A; + unsigned long end_jiffies = jiffies + + msecs_to_jiffies(gk20a_get_gr_idle_timeout(g)); + u32 ret; + + ret = gk20a_fifo_disable_engine_activity(g, gr_info, true); + if (ret) { + gk20a_err(dev_from_gk20a(g), + "failed to disable gr engine activity\n"); + return; + } + + ret = gr_gk20a_wait_idle(g, end_jiffies, GR_IDLE_CHECK_DEFAULT); + if (ret) { + gk20a_err(dev_from_gk20a(g), + "failed to idle graphics\n"); + goto clean_up; + } + + /* update zbc */ + gk20a_pmu_save_zbc(g, entries); + +clean_up: + ret = gk20a_fifo_enable_engine_activity(g, gr_info); + if (ret) { + gk20a_err(dev_from_gk20a(g), + "failed to enable gr engine activity\n"); + } + + return; +} + int gr_gk20a_add_zbc(struct gk20a *g, struct gr_gk20a *gr, struct zbc_entry *zbc_val) { @@ -3607,7 +3643,7 @@ int gr_gk20a_add_zbc(struct gk20a *g, struct gr_gk20a *gr, /* update zbc for elpg only when new entry is added */ entries = max(gr->max_used_color_index, gr->max_used_depth_index); - gk20a_pmu_save_zbc(g, entries); + gr_gk20a_pmu_save_zbc(g, entries); } return ret; |