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authorZhenyu Wang <zhenyuw@linux.intel.com>2009-09-19 14:54:06 +0800
committerGreg Kroah-Hartman <gregkh@suse.de>2009-10-05 09:32:08 -0700
commit8db54cc7e91e1f2063e6203fabac7ba7c470fea8 (patch)
tree11dbcd56009d8370b4addfd5d1910da8854cd1f9 /drivers/gpu
parentc10bea0fd064017b07714512bb1a1da0502c50e9 (diff)
drm/i915: Fix typo for wrong LVDS clock setting on IGDNG
commit b09aea7fb38f328c02e9f9b79617cabed02455e4 upstream. New register for PCH LVDS on IGDNG should be used. This is a copy-n-paste typo. This fixes possible dual channel LVDS panel failure on IGDNG. Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Diffstat (limited to 'drivers/gpu')
-rw-r--r--drivers/gpu/drm/i915/intel_display.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index ff3160ff6e8d..cd51a0460d17 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -818,7 +818,7 @@ intel_igdng_find_best_PLL(const intel_limit_t *limit, struct drm_crtc *crtc,
refclk, best_clock);
if (intel_pipe_has_type(crtc, INTEL_OUTPUT_LVDS)) {
- if ((I915_READ(LVDS) & LVDS_CLKB_POWER_MASK) ==
+ if ((I915_READ(PCH_LVDS) & LVDS_CLKB_POWER_MASK) ==
LVDS_CLKB_POWER_UP)
clock.p2 = limit->p2.p2_fast;
else