diff options
| author | Vijayakumar <vsubbu@nvidia.com> | 2014-06-27 14:50:31 +0530 |
|---|---|---|
| committer | Emad Mir <emir@nvidia.com> | 2014-06-30 11:16:48 -0700 |
| commit | 07830a2f0c60122f475ff22514146185ba7a05f3 (patch) | |
| tree | 2ca46b8a871b0299ee207b2bdca476428a068495 /drivers/gpu | |
| parent | 1d4720a1840ed9f73bafb31447535b4bd3bd2b8d (diff) | |
gpu:nvgpu:fix powergate disabling order
ELPG has to disabled before we write to clock gating registers
If ELPG is engaged during clock gating register write it will
cause error in ELPG engine
Bug 200013495
Bug 200014542
Change-Id: I57d1c59fc9311686829d898faddc90149df4cb46
Signed-off-by: Vijayakumar <vsubbu@nvidia.com>
Reviewed-on: http://git-master/r/432127
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Mitch Luban <mluban@nvidia.com>
Diffstat (limited to 'drivers/gpu')
| -rw-r--r-- | drivers/gpu/nvgpu/gk20a/dbg_gpu_gk20a.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/dbg_gpu_gk20a.c b/drivers/gpu/nvgpu/gk20a/dbg_gpu_gk20a.c index 07a48eea9f0c..a302749a61c7 100644 --- a/drivers/gpu/nvgpu/gk20a/dbg_gpu_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/dbg_gpu_gk20a.c @@ -558,6 +558,8 @@ static int dbg_set_powergate(struct dbg_session_gk20a *dbg_s, if (err) return -EPERM; + /*do elpg disable before clock gating disable*/ + gk20a_pmu_disable_elpg(g); g->ops.clock_gating.slcg_gr_load_gating_prod(g, false); g->ops.clock_gating.slcg_perf_load_gating_prod(g, @@ -568,7 +570,6 @@ static int dbg_set_powergate(struct dbg_session_gk20a *dbg_s, gr_gk20a_init_elcg_mode(g, ELCG_RUN, ENGINE_GR_GK20A); gr_gk20a_init_elcg_mode(g, ELCG_RUN, ENGINE_CE2_GK20A); - gk20a_pmu_disable_elpg(g); } dbg_s->is_pg_disabled = true; |