diff options
author | Dave Airlie <airlied@gmail.com> | 2012-09-02 20:22:04 +1000 |
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committer | Dave Airlie <airlied@gmail.com> | 2012-09-02 20:22:04 +1000 |
commit | f4fe968b61f530811d353c198f94bbeddefb26ee (patch) | |
tree | d669091866a1c9c919c845a018c4e85720b1a57f /drivers/gpu | |
parent | 4cbe5a555fa58a79b6ecbb6c531b8bab0650778d (diff) | |
parent | 991083ba60f89e717e3a4175be96d48a810e9eae (diff) |
Merge branch 'drm-nouveau-fixes' of git://anongit.freedesktop.org/nouveau/linux-2.6 into drm-fixes
These two fix the MacBook Pro 2012 Retina display.
* 'drm-nouveau-fixes' of git://anongit.freedesktop.org/nouveau/linux-2.6:
drm/nv50-/gpio: initialise to vbios defaults during init
drm/nvd0/disp: hopefully fix selection of 6/8bpc mode on DP outputs
Diffstat (limited to 'drivers/gpu')
-rw-r--r-- | drivers/gpu/drm/nouveau/nv50_gpio.c | 3 | ||||
-rw-r--r-- | drivers/gpu/drm/nouveau/nvd0_display.c | 4 |
2 files changed, 5 insertions, 2 deletions
diff --git a/drivers/gpu/drm/nouveau/nv50_gpio.c b/drivers/gpu/drm/nouveau/nv50_gpio.c index f429e6a8ca7a..f03490534893 100644 --- a/drivers/gpu/drm/nouveau/nv50_gpio.c +++ b/drivers/gpu/drm/nouveau/nv50_gpio.c @@ -115,6 +115,9 @@ nv50_gpio_init(struct drm_device *dev) { struct drm_nouveau_private *dev_priv = dev->dev_private; + /* initialise gpios and routing to vbios defaults */ + nouveau_gpio_reset(dev); + /* disable, and ack any pending gpio interrupts */ nv_wr32(dev, 0xe050, 0x00000000); nv_wr32(dev, 0xe054, 0xffffffff); diff --git a/drivers/gpu/drm/nouveau/nvd0_display.c b/drivers/gpu/drm/nouveau/nvd0_display.c index dac525b2994e..8a2fc89b7763 100644 --- a/drivers/gpu/drm/nouveau/nvd0_display.c +++ b/drivers/gpu/drm/nouveau/nvd0_display.c @@ -1510,10 +1510,10 @@ nvd0_sor_mode_set(struct drm_encoder *encoder, struct drm_display_mode *umode, case OUTPUT_DP: if (nv_connector->base.display_info.bpc == 6) { nv_encoder->dp.datarate = mode->clock * 18 / 8; - syncs |= 0x00000140; + syncs |= 0x00000002 << 6; } else { nv_encoder->dp.datarate = mode->clock * 24 / 8; - syncs |= 0x00000180; + syncs |= 0x00000005 << 6; } if (nv_encoder->dcb->sorconf.link & 1) |