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authorJordan Crouse <jcrouse@codeaurora.org>2017-11-21 12:40:57 -0700
committerRob Clark <robdclark@gmail.com>2018-01-10 08:58:42 -0500
commitc09513cfebd8d936a7aed3c0302104fb47a4a03a (patch)
tree00def9b8aa3880725e4a494ba88139e104fb75a8 /drivers/hv/hv_snapshot.c
parentf56d9df656c41b141399c1edbcc9b0ed048120c2 (diff)
drm/msm/adreno: a5xx: Explicitly program the CP0 performance counter
Even though the default countable for CP0 is CP_ALWAYS_COUNT (0), program the selector during HW initialization in an effort to be up front about which counters are programmed and why. Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
Diffstat (limited to 'drivers/hv/hv_snapshot.c')
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