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author | Alex Deucher <alexander.deucher@amd.com> | 2012-09-13 10:56:16 -0400 |
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committer | Alex Deucher <alexander.deucher@amd.com> | 2012-09-20 13:10:44 -0400 |
commit | 19eca43e5a52a8e47fdd40e940912b2417c7c055 (patch) | |
tree | 9ca6f599f97728f13be6f4abe81829973d1c302a /drivers/ide/ide-gd.c | |
parent | 2f454cf1261ba913e2f660b7555864b340502c60 (diff) |
drm/radeon: rework crtc pll setup to better support PPLL sharing
We need the calculate the pixel clock before allocating a PPLL
in order to insure the clocks really match.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/ide/ide-gd.c')
0 files changed, 0 insertions, 0 deletions