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authorBartlomiej Zolnierkiewicz <bzolnier@gmail.com>2007-02-17 02:40:25 +0100
committerBartlomiej Zolnierkiewicz <bzolnier@gmail.com>2007-02-17 02:40:25 +0100
commit7569e8dc2213ecc47024ea5edbadc8736487d926 (patch)
tree44c47e85b5e87c75972c077da31f198c4f597688 /drivers/ide/ide-lib.c
parent056a697b7388844a1341e92e277bff8e5bf61ec9 (diff)
ide: add ide_use_fast_pio() helper (v3)
* add ide_use_fast_pio() helper for use by host drivers * add DMA capability and hwif->autodma checks to ide_use_dma() - au1xxx-ide/it8213/it821x drivers didn't check for (id->capability & 1) [ for the IT8211/2 in SMART mode this check shouldn't be made but since in it821x_fixups() we set DMA bit explicitly: if(strstr(id->model, "Integrated Technology Express")) { /* In raid mode the ident block is slightly buggy We need to set the bits so that the IDE layer knows LBA28. LBA48 and DMA ar valid */ id->capability |= 3; /* LBA28, DMA */ we are better off using generic helper if we can ] - ide-cris driver didn't set ->autodma [ before the patch hwif->autodma was only checked in the chipset specific hwif->ide_dma_check implementations, for ide-cris it is cris_dma_check() function so there no behavior change here ] v2: * updated patch description (thanks to Alan Cox for the feedback) v3: * updated for scc_pata driver Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
Diffstat (limited to 'drivers/ide/ide-lib.c')
-rw-r--r--drivers/ide/ide-lib.c15
1 files changed, 15 insertions, 0 deletions
diff --git a/drivers/ide/ide-lib.c b/drivers/ide/ide-lib.c
index bea5e13ee361..8afce4ceea31 100644
--- a/drivers/ide/ide-lib.c
+++ b/drivers/ide/ide-lib.c
@@ -205,6 +205,21 @@ int ide_dma_enable (ide_drive_t *drive)
EXPORT_SYMBOL(ide_dma_enable);
+int ide_use_fast_pio(ide_drive_t *drive)
+{
+ struct hd_driveid *id = drive->id;
+
+ if ((id->capability & 1) && drive->autodma)
+ return 1;
+
+ if ((id->capability & 8) || (id->field_valid & 2))
+ return 1;
+
+ return 0;
+}
+
+EXPORT_SYMBOL_GPL(ide_use_fast_pio);
+
/*
* Standard (generic) timings for PIO modes, from ATA2 specification.
* These timings are for access to the IDE data port register *only*.