diff options
author | Bartlomiej Zolnierkiewicz <bzolnier@gmail.com> | 2010-01-19 01:47:29 -0800 |
---|---|---|
committer | David S. Miller <davem@davemloft.net> | 2010-01-19 01:47:29 -0800 |
commit | 8e714a074bc4da070807d019d4287dcd32af55f5 (patch) | |
tree | 4c13df2062e12406465bd0b1218cadb3dcfe2066 /drivers/ide | |
parent | 8776168ca2151850164af1de5565d01f7b8b2c53 (diff) |
ide-timings: use ->pio_mode value to determine fastest PIO speed
Use the current PIO mode value instead of the physical maximum one
to determine the fastest allowed PIO for shared PIO/DMA timings.
Affected host drivers: amd74xx and via82cxxx.
[ Update comment to match -DaveM ]
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/ide')
-rw-r--r-- | drivers/ide/ide-timings.c | 5 |
1 files changed, 2 insertions, 3 deletions
diff --git a/drivers/ide/ide-timings.c b/drivers/ide/ide-timings.c index c6053ab2b6c6..c7a65ee72310 100644 --- a/drivers/ide/ide-timings.c +++ b/drivers/ide/ide-timings.c @@ -186,11 +186,10 @@ int ide_timing_compute(ide_drive_t *drive, u8 speed, /* * Even in DMA/UDMA modes we still use PIO access for IDENTIFY, * S.M.A.R.T and some other commands. We have to ensure that the - * DMA cycle timing is slower/equal than the fastest PIO timing. + * DMA cycle timing is slower/equal than the current PIO timing. */ if (speed >= XFER_SW_DMA_0) { - u8 pio = ide_get_best_pio_mode(drive, 255, 5); - ide_timing_compute(drive, XFER_PIO_0 + pio, &p, T, UT); + ide_timing_compute(drive, drive->pio_mode, &p, T, UT); ide_timing_merge(&p, t, t, IDE_TIMING_ALL); } |