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| author | Joerg Roedel <joerg.roedel@amd.com> | 2011-11-21 15:59:08 +0100 |
|---|---|---|
| committer | Hiroshi DOYU <hdoyu@nvidia.com> | 2012-01-23 11:11:40 +0200 |
| commit | 7a937ceb42da1eafa448cd197aea66a7e1724ff1 (patch) | |
| tree | 96cfc800cd9cb62356c1f96d3936ec0cf28e2223 /drivers/iommu/amd_iommu_proto.h | |
| parent | 3d7f08fab748be7da1fedc40dfd226cee7edae0a (diff) | |
iommu/amd: Implement IOMMUv2 TLB flushing routines
The functions added with this patch allow to manage the
IOMMU and the device TLBs for all devices in an IOMMUv2
domain.
Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
Diffstat (limited to 'drivers/iommu/amd_iommu_proto.h')
| -rw-r--r-- | drivers/iommu/amd_iommu_proto.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/iommu/amd_iommu_proto.h b/drivers/iommu/amd_iommu_proto.h index d207b1d951b2..a92dc6117e2f 100644 --- a/drivers/iommu/amd_iommu_proto.h +++ b/drivers/iommu/amd_iommu_proto.h @@ -40,6 +40,9 @@ extern int amd_iommu_register_ppr_notifier(struct notifier_block *nb); extern int amd_iommu_unregister_ppr_notifier(struct notifier_block *nb); extern void amd_iommu_domain_direct_map(struct iommu_domain *dom); extern int amd_iommu_domain_enable_v2(struct iommu_domain *dom, int pasids); +extern int amd_iommu_flush_page(struct iommu_domain *dom, int pasid, + u64 address); +extern int amd_iommu_flush_tlb(struct iommu_domain *dom, int pasid); #ifndef CONFIG_AMD_IOMMU_STATS |