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authorBen Dooks <ben.dooks@codethink.co.uk>2016-06-08 19:31:10 +0100
committerJoerg Roedel <jroedel@suse.de>2016-06-21 11:59:03 +0200
commit6ae5343c26f9cba5e9ef8ba6f23b5bb255ebc798 (patch)
tree800bcdf19e1ee43cd5dcb2eef6000f6c5e696bf4 /drivers/iommu/exynos-iommu.c
parent96f6655700d16d1bae8ef49db6ce28607ebee6f3 (diff)
iommu/exynos: update to use iommu big-endian
Add initial support for big endian by always writing the pte in le32. Note, revisit if hardware capable of doing big endian fetches. Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk> Acked-by: Marek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: Joerg Roedel <jroedel@suse.de>
Diffstat (limited to 'drivers/iommu/exynos-iommu.c')
-rw-r--r--drivers/iommu/exynos-iommu.c6
1 files changed, 5 insertions, 1 deletions
diff --git a/drivers/iommu/exynos-iommu.c b/drivers/iommu/exynos-iommu.c
index 633e6d023c0d..33dcc29ec200 100644
--- a/drivers/iommu/exynos-iommu.c
+++ b/drivers/iommu/exynos-iommu.c
@@ -54,6 +54,10 @@ typedef u32 sysmmu_pte_t;
#define lv2ent_small(pent) ((*(pent) & 2) == 2)
#define lv2ent_large(pent) ((*(pent) & 3) == 1)
+#ifdef CONFIG_BIG_ENDIAN
+#warning "revisit driver if we can enable big-endian ptes"
+#endif
+
/*
* v1.x - v3.x SYSMMU supports 32bit physical and 32bit virtual address spaces
* v5.0 introduced support for 36bit physical address space by shifting
@@ -710,7 +714,7 @@ static inline void update_pte(sysmmu_pte_t *ent, sysmmu_pte_t val)
{
dma_sync_single_for_cpu(dma_dev, virt_to_phys(ent), sizeof(*ent),
DMA_TO_DEVICE);
- *ent = val;
+ *ent = cpu_to_le32(val);
dma_sync_single_for_device(dma_dev, virt_to_phys(ent), sizeof(*ent),
DMA_TO_DEVICE);
}