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authorYun Wu <wuyun.wu@huawei.com>2015-03-06 16:37:46 +0000
committerJason Cooper <jason@lakedaemon.net>2015-03-08 05:33:54 +0000
commit6c834125ba460eb1eea63bcc053b45564ca93407 (patch)
tree45c7519954082453d7e05b00e7ed61a5ff2e22df /drivers/irqchip/irq-sunxi-nmi.c
parent614be385521b08b849da1098625da591984738c0 (diff)
irqchip: gicv3-its: Zero itt before handling to hardware
Some kind of brain-dead implementations chooses to insert ITEes in rapid sequence of disabled ITEes, and an un-zeroed ITT will confuse ITS on judging whether an ITE is really enabled or not. Considering the implementations are still supported by the GICv3 architecture, in which ITT is not required to be zeroed before being handled to hardware, we do the favor in ITS driver. Acked-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Yun Wu <wuyun.wu@huawei.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Link: https://lkml.kernel.org/r/1425659870-11832-8-git-send-email-marc.zyngier@arm.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Diffstat (limited to 'drivers/irqchip/irq-sunxi-nmi.c')
0 files changed, 0 insertions, 0 deletions