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authorJacky Bai <ping.bai@nxp.com>2020-02-14 11:49:22 +0800
committerJacky Bai <ping.bai@nxp.com>2020-02-21 13:40:30 +0800
commit3d65a3518149d33e289b5417d7a4a175b4ef0737 (patch)
tree62a00ef656e5aa6a613e46aa740ea1df64a28216 /drivers/irqchip
parente8ccca366a25bcb433f1dad15f7fc2272af50bce (diff)
MLK-23354 irqchip: gpcv2: Add wait mode workaround on imx8mp
Add the wait mode workaround on i.MX8MP. it is just a provisional patch for Alpha release. it will be dropped in the future. As all the changes in this patch need to be revered for that time, just including all the changes of dts & driver in one patch to make it more easier to track all the changes. Coresight probe has some conlict with the IPI workaround. it is meaningless to put effort on resolve such conflict, and Coresight is not an must feature for Alpha release, disable the Coresight support directly. Signed-off-by: Jacky Bai <ping.bai@nxp.com> Reviewed-by: Anson Huang <Anson.Huang@nxp.com>
Diffstat (limited to 'drivers/irqchip')
-rw-r--r--drivers/irqchip/irq-imx-gpcv2.c5
1 files changed, 4 insertions, 1 deletions
diff --git a/drivers/irqchip/irq-imx-gpcv2.c b/drivers/irqchip/irq-imx-gpcv2.c
index 988c08cad87d..16edb2f35a1e 100644
--- a/drivers/irqchip/irq-imx-gpcv2.c
+++ b/drivers/irqchip/irq-imx-gpcv2.c
@@ -332,6 +332,7 @@ static const struct irq_domain_ops gpcv2_irqchip_data_domain_ops = {
static const struct of_device_id gpcv2_of_match[] = {
{ .compatible = "fsl,imx7d-gpc", .data = (const void *) 2 },
{ .compatible = "fsl,imx8mq-gpc", .data = (const void *) 4 },
+ { .compatible = "fsl,imx8mp-gpc", .data = (const void *) 4 },
{ /* END */ }
};
@@ -387,7 +388,8 @@ static int __init imx_gpcv2_irqchip_init(struct device_node *node,
}
irq_set_default_host(domain);
- if (of_machine_is_compatible("fsl,imx8mq")) {
+ if (of_machine_is_compatible("fsl,imx8mq") ||
+ of_machine_is_compatible("fsl,imx8mp")) {
/* sw workaround for IPI can't wakeup CORE
ERRATA(ERR011171) on i.MX8MQ */
err11171 = true;
@@ -435,3 +437,4 @@ static int __init imx_gpcv2_irqchip_init(struct device_node *node,
IRQCHIP_DECLARE(imx_gpcv2_imx7d, "fsl,imx7d-gpc", imx_gpcv2_irqchip_init);
IRQCHIP_DECLARE(imx_gpcv2_imx8mq, "fsl,imx8mq-gpc", imx_gpcv2_irqchip_init);
+IRQCHIP_DECLARE(imx_gpcv2_imx8mp, "fsl,imx8mp-gpc", imx_gpcv2_irqchip_init);