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authorMauro Carvalho Chehab <mchehab@redhat.com>2012-01-20 19:13:07 -0300
committerMauro Carvalho Chehab <mchehab@redhat.com>2012-01-21 13:46:35 -0200
commit6fb65a66a227013ba1825efcf47e3c5df1a39131 (patch)
tree887f0df97560137b7de41fb4843c6879ebd7bf33 /drivers/media/dvb/frontends
parent6e5caf8493fabbb1c6aec1cb98adb9667182a1c6 (diff)
[media] drxk: add support for Mpeg output clock drive strength config
Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
Diffstat (limited to 'drivers/media/dvb/frontends')
-rw-r--r--drivers/media/dvb/frontends/drxk.h4
-rw-r--r--drivers/media/dvb/frontends/drxk_hard.c12
2 files changed, 9 insertions, 7 deletions
diff --git a/drivers/media/dvb/frontends/drxk.h b/drivers/media/dvb/frontends/drxk.h
index 6b0fd2c5dcd6..ca921c77f71f 100644
--- a/drivers/media/dvb/frontends/drxk.h
+++ b/drivers/media/dvb/frontends/drxk.h
@@ -17,6 +17,7 @@
* @antenna_gpio: GPIO bit used to control the antenna
* @antenna_dvbt: GPIO bit for changing antenna to DVB-C. A value of 1
* means that 1=DVBC, 0 = DVBT. Zero means the opposite.
+ * @mpeg_out_clk_strength: DRXK Mpeg output clock drive strength.
* @microcode_name: Name of the firmware file with the microcode
*
* On the *_gpio vars, bit 0 is UIO-1, bit 1 is UIO-2 and bit 2 is
@@ -32,7 +33,8 @@ struct drxk_config {
bool antenna_dvbt;
u16 antenna_gpio;
- int chunk_size;
+ u8 mpeg_out_clk_strength;
+ int chunk_size;
const char *microcode_name;
};
diff --git a/drivers/media/dvb/frontends/drxk_hard.c b/drivers/media/dvb/frontends/drxk_hard.c
index 65703968d8ae..d25b0d20038b 100644
--- a/drivers/media/dvb/frontends/drxk_hard.c
+++ b/drivers/media/dvb/frontends/drxk_hard.c
@@ -91,10 +91,6 @@ bool IsA1WithRomCode(struct drxk_state *state)
#define DRXK_MPEG_PARALLEL_OUTPUT_PIN_DRIVE_STRENGTH (0x03)
#endif
-#ifndef DRXK_MPEG_OUTPUT_CLK_DRIVE_STRENGTH
-#define DRXK_MPEG_OUTPUT_CLK_DRIVE_STRENGTH (0x06)
-#endif
-
#define DEFAULT_DRXK_MPEG_LOCK_TIMEOUT 700
#define DEFAULT_DRXK_DEMOD_LOCK_TIMEOUT 500
@@ -659,7 +655,6 @@ static int init_state(struct drxk_state *state)
u32 ulGPIOCfg = 0x0113;
u32 ulInvertTSClock = 0;
u32 ulTSDataStrength = DRXK_MPEG_SERIAL_OUTPUT_PIN_DRIVE_STRENGTH;
- u32 ulTSClockkStrength = DRXK_MPEG_OUTPUT_CLK_DRIVE_STRENGTH;
u32 ulDVBTBitrate = 50000000;
u32 ulDVBCBitrate = DRXK_QAM_SYMBOLRATE_MAX * 8;
@@ -820,7 +815,6 @@ static int init_state(struct drxk_state *state)
state->m_DVBCBitrate = ulDVBCBitrate;
state->m_TSDataStrength = (ulTSDataStrength & 0x07);
- state->m_TSClockkStrength = (ulTSClockkStrength & 0x07);
/* Maximum bitrate in b/s in case static clockrate is selected */
state->m_mpegTsStaticBitrate = 19392658;
@@ -6394,6 +6388,12 @@ struct dvb_frontend *drxk_attach(const struct drxk_config *config,
state->m_DVBCStaticCLK = 1;
}
+
+ if (config->mpeg_out_clk_strength)
+ state->m_TSClockkStrength = config->mpeg_out_clk_strength & 0x07;
+ else
+ state->m_TSClockkStrength = 0x06;
+
if (config->parallel_ts)
state->m_enableParallel = true;
else