diff options
| author | Sylwester Nawrocki <s.nawrocki@samsung.com> | 2011-12-01 14:02:24 -0300 |
|---|---|---|
| committer | Mauro Carvalho Chehab <mchehab@redhat.com> | 2011-12-30 14:06:14 -0200 |
| commit | dafb9c70abb7896a43288fbec2a9f2ed6e915d18 (patch) | |
| tree | aa100710eda09656f68748e5d626393e05777ef0 /drivers/media/video/s5p-fimc/fimc-capture.c | |
| parent | cc1d327232759647ea56725eab1c6b16c92d52fa (diff) | |
[media] s5p-fimc: Add support for alpha component configuration
On Exynos SoCs the FIMC IP allows to configure globally the alpha
component of all pixels for V4L2_PIX_FMT_RGB32, V4L2_PIX_FMT_RGB555
and V4L2_PIX_FMT_RGB444 image formats. This patch adds a v4l2 control
in order to let the applications control the alpha component value.
The alpha value range depends on the pixel format, for RGB32 it's
0..255 (8-bits), for RGB555 - 0..1 (1-bit) and for RGB444 - 0..15
(4-bits). The v4l2 control range is always 0..255 and the alpha
component data width is determined by currently set format on the
V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE buffer queue. The applications
need to match the alpha channel value range and the pixel format
since the driver will clamp the alpha component. Depending on
fourcc the valid alpha bits are:
- V4L2_PIX_FMT_RGB555 [0]
- V4L2_PIX_FMT_RGB444 [3:0]
- V4L2_PIX_FMT_RGB32 [7:0]
When switching to a pixel format with smaller alpha component width
the currently set alpha value will be clamped to maximum value valid
for current format. When switching to a format with wider alpha the
alpha value remains unchanged.
The variant description data structure is extended with a new entry
so an additional control is created only where really supported by
the hardware.
V4L2_PIX_FMT_RGB555 and V4L2_PIX_FMT_RGB444 formats are only valid
for V4L2_BUF_TYPE_VIDEO_CAPTURE buffer queue.
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
Diffstat (limited to 'drivers/media/video/s5p-fimc/fimc-capture.c')
| -rw-r--r-- | drivers/media/video/s5p-fimc/fimc-capture.c | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/drivers/media/video/s5p-fimc/fimc-capture.c b/drivers/media/video/s5p-fimc/fimc-capture.c index 2cc3b9166724..510cfab477ff 100644 --- a/drivers/media/video/s5p-fimc/fimc-capture.c +++ b/drivers/media/video/s5p-fimc/fimc-capture.c @@ -63,6 +63,8 @@ static int fimc_init_capture(struct fimc_dev *fimc) fimc_hw_set_effect(ctx, false); fimc_hw_set_output_path(ctx); fimc_hw_set_out_dma(ctx); + if (fimc->variant->has_alpha) + fimc_hw_set_rgb_alpha(ctx); clear_bit(ST_CAPT_APPLY_CFG, &fimc->state); } spin_unlock_irqrestore(&fimc->slock, flags); @@ -154,6 +156,8 @@ int fimc_capture_config_update(struct fimc_ctx *ctx) fimc_hw_set_rotation(ctx); fimc_prepare_dma_offset(ctx, &ctx->d_frame); fimc_hw_set_out_dma(ctx); + if (fimc->variant->has_alpha) + fimc_hw_set_rgb_alpha(ctx); clear_bit(ST_CAPT_APPLY_CFG, &fimc->state); } spin_unlock(&ctx->slock); @@ -812,6 +816,10 @@ static int fimc_capture_set_format(struct fimc_dev *fimc, struct v4l2_format *f) FIMC_SD_PAD_SOURCE); if (!ff->fmt) return -EINVAL; + + /* Update RGB Alpha control state and value range */ + fimc_alpha_ctrl_update(ctx); + /* Try to match format at the host and the sensor */ if (!fimc->vid_cap.user_subdev_api) { mf->code = ff->fmt->mbus_code; @@ -1235,6 +1243,9 @@ static int fimc_subdev_set_fmt(struct v4l2_subdev *sd, *mf = fmt->format; return 0; } + /* Update RGB Alpha control state and value range */ + fimc_alpha_ctrl_update(ctx); + fimc_capture_mark_jpeg_xfer(ctx, fimc_fmt_is_jpeg(ffmt->color)); ff = fmt->pad == FIMC_SD_PAD_SINK ? |