diff options
| author | Peter Gielda <pgielda@antmicro.com> | 2013-08-07 19:49:31 +0200 |
|---|---|---|
| committer | Marcel Ziswiler <marcel.ziswiler@toradex.com> | 2013-08-13 11:57:44 +0200 |
| commit | 304fae6e8872c4b9d694900c5cef91abdbc81c7e (patch) | |
| tree | c282c19400532d430255952aad8c6a11156c5e95 /drivers/media/video/tegra_v4l2_camera.c | |
| parent | a207afeae668f9cd9fee570838f07b4cc9a8fc7e (diff) | |
tegra_v4l2: added external/internal sync selectionT30_LinuxImageV2.0Beta3_20130820Apalis_T30_LinuxImageV2.0Beta2_20130816
Diffstat (limited to 'drivers/media/video/tegra_v4l2_camera.c')
| -rw-r--r-- | drivers/media/video/tegra_v4l2_camera.c | 11 |
1 files changed, 9 insertions, 2 deletions
diff --git a/drivers/media/video/tegra_v4l2_camera.c b/drivers/media/video/tegra_v4l2_camera.c index 5224515c41ce..14a74cd6b7cc 100644 --- a/drivers/media/video/tegra_v4l2_camera.c +++ b/drivers/media/video/tegra_v4l2_camera.c @@ -37,6 +37,11 @@ #define TEGRA_CAM_DRV_NAME "vi" #define TEGRA_CAM_VERSION_CODE KERNEL_VERSION(0, 0, 5) +static unsigned int internal_sync = 0; +module_param(internal_sync, int, 0644); +MODULE_PARM_DESC(internal_sync, "enable internal vsync and hsync decoded " \ + "from data"); + #define TEGRA_SYNCPT_VI_WAIT_TIMEOUT 25 #define TEGRA_SYNCPT_CSI_WAIT_TIMEOUT 200 @@ -550,7 +555,9 @@ static void tegra_camera_capture_setup_vip(struct tegra_camera_dev *pcdev, TC_VI_REG_WT(pcdev, TEGRA_VI_VI_INPUT_CONTROL, // (1 << 27) | /* field detect */ (0 << 28) | /* 1 == top field is even field, 00 == odd */ -// (1 << 25) | /* hsync/vsync decoded from data (BT.656) */ + ((internal_sync == 1) << 25) | /* 1 == hsync/vsync decoded + internally from data + (BT.656) */ (yuv_input_format << 8) | (1 << 1) | /* VIP_INPUT_ENABLE */ (input_format << 2)); @@ -561,7 +568,7 @@ static void tegra_camera_capture_setup_vip(struct tegra_camera_dev *pcdev, /* VIP H_ACTIVE and V_ACTIVE */ TC_VI_REG_WT(pcdev, TEGRA_VI_VIP_H_ACTIVE, (icd->user_width << 16) | - TEGRA_VIP_H_ACTIVE_START); + (TEGRA_VIP_H_ACTIVE_START - ((internal_sync == 1)?1:0))); TC_VI_REG_WT(pcdev, TEGRA_VI_VIP_V_ACTIVE, ( ( IS_INTERLACED ? (icd->user_height/2) : (icd->user_height) ) << 16) | TEGRA_VIP_V_ACTIVE_START); |