diff options
| author | Charlie Huang <chahuang@nvidia.com> | 2013-02-07 17:36:56 -0800 |
|---|---|---|
| committer | Mandar Padmawar <mpadmawar@nvidia.com> | 2013-03-11 07:52:52 -0700 |
| commit | 170fd6274b64802ad432be413737ec5071f7ecc8 (patch) | |
| tree | 4ba68c4126bcee51c823e1920bf9dcfebf103ea4 /drivers/media/video | |
| parent | acec159f9118120280806b9658d8fefb690ee3dc (diff) | |
media: tegra: max77665-flash: flash not turned on
The default mode of register CHG_CNFG_00 is 0x04 which will disable
the flash function.
Update the default mode to 0x0C.
bug 1242531
Change-Id: Icb8952817c8078e702b6764f5e398458f0078850
Signed-off-by: Charlie Huang <chahuang@nvidia.com>
Reviewed-on: http://git-master/r/198594
(cherry picked from commit cb0d4c861d276e4c26b0d0efe038372f5cb6546b)
Reviewed-on: http://git-master/r/206879
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Tested-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Diffstat (limited to 'drivers/media/video')
| -rw-r--r-- | drivers/media/video/tegra/max77665-flash.c | 10 |
1 files changed, 9 insertions, 1 deletions
diff --git a/drivers/media/video/tegra/max77665-flash.c b/drivers/media/video/tegra/max77665-flash.c index 457099031bc2..15cf8897dfc0 100644 --- a/drivers/media/video/tegra/max77665-flash.c +++ b/drivers/media/video/tegra/max77665-flash.c @@ -1,7 +1,7 @@ /* * MAX77665_F.c - MAX77665_F flash/torch kernel driver * - * Copyright (c) 2012, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2012-2013, NVIDIA CORPORATION. All rights reserved. * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -92,6 +92,9 @@ #define MAX77665_F_RW_FLASH_INTMASK 0x0F #define MAX77665_F_RO_FLASH_STATUS 0x10 +#define MAX77665_PMIC_CHG_CNFG_01 0xB7 +#define CHG_CNFG_01_DEFAULT_MODE 0x0C + #define FIELD(x, y) ((x) << (y)) #define FMASK(x) FIELD(0x03, (x)) @@ -212,6 +215,7 @@ struct max77665_f_reg_cache { u8 m_timing; u8 boost_control; u8 boost_vout_flash; + u8 pmic_chg_cnfg01; }; struct max77665_f_state_regs { @@ -689,6 +693,7 @@ update_end: if (info->regs.boost_control == FIELD(BOOST_FLASH_MODE_BOTH, 0)) info->regs.boost_control |= FIELD(BOOST_MODE_TWOLED, 7); + info->regs.pmic_chg_cnfg01 = CHG_CNFG_01_DEFAULT_MODE; info->regs.boost_vout_flash = max77665_f_get_boost_volt(pcfg->boost_vout_flash_mV); @@ -748,6 +753,9 @@ static int max77665_f_update_settings(struct max77665_f_info *info) int err = 0; info->regs.regs_stale = true; + err |= max77665_f_reg_wr(info, MAX77665_PMIC_CHG_CNFG_01, + info->regs.pmic_chg_cnfg01, false); + err |= max77665_f_reg_wr(info, MAX77665_F_RW_BOOST_MODE, info->regs.boost_control, false); |