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authorCharlie Huang <chahuang@nvidia.com>2011-07-22 16:33:33 -0700
committerVarun Colbert <vcolbert@nvidia.com>2011-07-25 15:13:48 -0700
commitf633ff9037db7842c08fcfc7227113f6f762f6b8 (patch)
treee41ba6720c1b3c774a576467dc246e58d3e57edd /drivers/media/video
parentbe9182e70799124f527028e24060cdbac5352176 (diff)
media: video: tegra: disable ov2710 AWB
set manual white balance otherwise it will conflict with isp bug 829281 Change-Id: Id89ae1dd7e607beb35b43db5991742d3b8dcc345 Reviewed-on: http://git-master/r/42709 Reviewed-by: Chonglei Huang <chahuang@nvidia.com> Reviewed-by: Andrei Denissov <adenissov@nvidia.com> Reviewed-by: Daniel Willemsen <dwillemsen@nvidia.com> Reviewed-by: Gary Zhang <garyz@nvidia.com> Reviewed-by: Frank Chen <frankc@nvidia.com> Tested-by: Chonglei Huang <chahuang@nvidia.com>
Diffstat (limited to 'drivers/media/video')
-rw-r--r--drivers/media/video/tegra/ov2710.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/media/video/tegra/ov2710.c b/drivers/media/video/tegra/ov2710.c
index ec507c62b996..90c2bb4b3189 100644
--- a/drivers/media/video/tegra/ov2710.c
+++ b/drivers/media/video/tegra/ov2710.c
@@ -165,6 +165,7 @@ static struct ov2710_reg mode_1920x1080[] = {
{0x350c, 0xff}, /* peak VTS reg, set to highest limit */
{0x350d, 0xff}, /* peak VTS reg, set to highest limit */
+ {0x3406, 0x01}, /* AWB manual, 0-auto, 1-manual */
{0x3503, 0x07}, /* enable manual gain and manual exposure */
{0x3500, 0x00}, /* write default to AEC PK EXPO */
{0x3501, 0x00}, /* write default to AEC PK EXPO */
@@ -282,6 +283,7 @@ static struct ov2710_reg mode_1280x720[] = {
{0x350c, 0xff}, /* peak VTS reg, set to highest limit */
{0x350d, 0xff}, /* peak VTS reg, set to highest limit */
+ {0x3406, 0x01}, /* AWB manual, 0-auto, 1-manual */
{0x3503, 0x07}, /* enable manual gain and manual exposure */
{0x3500, 0x00}, /* write default to AEC PK EXPO */
{0x3501, 0x00}, /* write default to AEC PK EXPO */