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authorSanchayan Maity <maitysanchayan@gmail.com>2016-05-18 18:37:43 +0530
committerPhilippe Schenker <philippe.schenker@toradex.com>2020-08-13 16:04:36 +0200
commit0f25ebb4331ae47ef3d3f11251d2f6808b8dcb2d (patch)
tree45a542fdf2a8fbce71a66cc2cf581711eb6b8c12 /drivers/media
parent10559d171de3b7b437e62797ca77cab08bf1c0bd (diff)
mxc_v4l2_capture: Allow clock setting for de-interlaced video input
Make provision for a decoder driver to specify clock mode for progressive in case the decoder provides deinterlaced output. This is required for ADV7280 decoder where we can use the hardware deinterlace capabity of ADV7280. Without setting the clock mode to progressive but having hardware deinterlace on for ADV7280 results in a non working setup. Signed-off-by: Sanchayan Maity <sanchayan.maity@toradex.com> Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> (cherry picked from commit 0368155fc985c8e2bf6334fc5b56ff2ac6082908) (cherry picked from commit 80aae0b2253258df3bd056a719de3b1b1c5b223a) (cherry picked from commit d5f4e4af7d29fcbbc2e460871dec891552b4faf4)
Diffstat (limited to 'drivers/media')
-rw-r--r--drivers/media/platform/mxc/capture/mxc_v4l2_capture.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/media/platform/mxc/capture/mxc_v4l2_capture.c b/drivers/media/platform/mxc/capture/mxc_v4l2_capture.c
index 671d0aa28b1a..21d360744f8d 100644
--- a/drivers/media/platform/mxc/capture/mxc_v4l2_capture.c
+++ b/drivers/media/platform/mxc/capture/mxc_v4l2_capture.c
@@ -1351,6 +1351,8 @@ static int mxc_v4l2_s_param(cam_data *cam, struct v4l2_streamparm *parm)
pr_debug(" clock_curr=mclk=%d\n", ifparm.u.bt656.clock_curr);
if (ifparm.u.bt656.clock_curr == 0)
csi_param.clk_mode = IPU_CSI_CLK_MODE_CCIR656_INTERLACED;
+ else if (ifparm.u.bt656.clock_curr == 1)
+ csi_param.clk_mode = IPU_CSI_CLK_MODE_CCIR656_PROGRESSIVE;
else
csi_param.clk_mode = IPU_CSI_CLK_MODE_GATED_CLK;