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authorFrank Chen <frankc@nvidia.com>2011-09-15 19:06:37 -0700
committerVarun Colbert <vcolbert@nvidia.com>2011-09-16 14:59:59 -0700
commit46734a4f0c173da6ddba8a7306191319ef71f17a (patch)
treedf49f1a70a580b2a91fe67224f122e115a28ac9e /drivers/media
parent6427b2fb3b132f36cac2e32dc2b23a5c01a588fb (diff)
media: video: tegra: fix ov2710 preview tearing issue.
Delay gain change by 1 frame. This will prevent sensor applying new gain setting in the middle of the frame. Bug 870349 Change-Id: Ib4e0e2fef99dcbf05a0656640af529e8f02c2a7d Reviewed-on: http://git-master/r/52773 Reviewed-by: Krupal Divvela <kdivvela@nvidia.com> Tested-by: Krupal Divvela <kdivvela@nvidia.com> Tested-by: Frank Chen <frankc@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Diffstat (limited to 'drivers/media')
-rw-r--r--drivers/media/video/tegra/ov2710.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/media/video/tegra/ov2710.c b/drivers/media/video/tegra/ov2710.c
index 90c2bb4b3189..84f0e686c0dc 100644
--- a/drivers/media/video/tegra/ov2710.c
+++ b/drivers/media/video/tegra/ov2710.c
@@ -166,7 +166,7 @@ static struct ov2710_reg mode_1920x1080[] = {
{0x350c, 0xff}, /* peak VTS reg, set to highest limit */
{0x350d, 0xff}, /* peak VTS reg, set to highest limit */
{0x3406, 0x01}, /* AWB manual, 0-auto, 1-manual */
- {0x3503, 0x07}, /* enable manual gain and manual exposure */
+ {0x3503, 0x13}, /* enable manual gain and manual exposure */
{0x3500, 0x00}, /* write default to AEC PK EXPO */
{0x3501, 0x00}, /* write default to AEC PK EXPO */
{0x3502, 0x02}, /* write default to AEC PK EXPO */
@@ -284,7 +284,7 @@ static struct ov2710_reg mode_1280x720[] = {
{0x350c, 0xff}, /* peak VTS reg, set to highest limit */
{0x350d, 0xff}, /* peak VTS reg, set to highest limit */
{0x3406, 0x01}, /* AWB manual, 0-auto, 1-manual */
- {0x3503, 0x07}, /* enable manual gain and manual exposure */
+ {0x3503, 0x13}, /* enable manual gain and manual exposure */
{0x3500, 0x00}, /* write default to AEC PK EXPO */
{0x3501, 0x00}, /* write default to AEC PK EXPO */
{0x3502, 0x02}, /* write default to AEC PK EXPO */