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| author | Kevin Hilman <khilman@linaro.org> | 2015-06-24 21:32:13 -0700 |
|---|---|---|
| committer | Kevin Hilman <khilman@linaro.org> | 2015-06-24 21:32:13 -0700 |
| commit | 03fa626774a30145bdb97ce1bc909a0cfd419ce6 (patch) | |
| tree | a0d66f91d4a983b94f6d74b7b03b5c9e00697499 /drivers/memory/omap-gpmc.c | |
| parent | 8d2977bf36bf6fc66d0c8e64263711cc2f0c1e4b (diff) | |
| parent | 2879e43f09122f8b3ef5456e3d7e48716b086e60 (diff) | |
Merge tag 'armsoc-soc' into test-merge
ARM: SoC: platform support for v4.2
Our SoC branch usually contains expanded support for new SoCs and
other core platform code. Some highlights from this round:
- sunxi: SMP support for A23 SoC
- socpga: big-endian support
- pxa: conversion to common clock framework
- bcm: SMP support for BCM63138
- imx: support new I.MX7D SoC
- zte: basic support for ZX296702 SoC
Conflicts:
arch/arm/mach-socfpga/core.h
Trivial remove/remove conflict with our cleanup branch.
Resolution: remove both sides
# gpg: Signature made Wed Jun 24 21:32:12 2015 PDT using RSA key ID D3FBC665
# gpg: Good signature from "Kevin Hilman <khilman@deeprootsystems.com>"
# gpg: aka "Kevin Hilman <khilman@linaro.org>"
# gpg: aka "Kevin Hilman <khilman@kernel.org>"
# Conflicts:
# arch/arm/mach-socfpga/core.h
Diffstat (limited to 'drivers/memory/omap-gpmc.c')
| -rw-r--r-- | drivers/memory/omap-gpmc.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/drivers/memory/omap-gpmc.c b/drivers/memory/omap-gpmc.c index c94ea0d68746..8911e51d410a 100644 --- a/drivers/memory/omap-gpmc.c +++ b/drivers/memory/omap-gpmc.c @@ -403,7 +403,7 @@ static void gpmc_cs_bool_timings(int cs, const struct gpmc_bool_timings *p) p->cycle2cyclediffcsen); } -#ifdef DEBUG +#ifdef CONFIG_OMAP_GPMC_DEBUG /** * get_gpmc_timing_reg - read a timing parameter and print DTS settings for it. * @cs: Chip Select Region @@ -612,7 +612,7 @@ static int set_gpmc_timing_reg(int cs, int reg, int st_bit, int end_bit, int max } l = gpmc_cs_read_reg(cs, reg); -#ifdef DEBUG +#ifdef CONFIG_OMAP_GPMC_DEBUG pr_info( "GPMC CS%d: %-17s: %3d ticks, %3lu ns (was %3i ticks) %3d ns\n", cs, name, ticks, gpmc_get_clk_period(cs, cd) * ticks / 1000, @@ -767,7 +767,7 @@ int gpmc_cs_set_timings(int cs, const struct gpmc_timings *t, GPMC_CONFIG1_CLKACTIVATIONTIME_MAX, clk_activation, GPMC_CD_FCLK); -#ifdef DEBUG +#ifdef CONFIG_OMAP_GPMC_DEBUG pr_info("GPMC CS%d CLK period is %lu ns (div %d)\n", cs, (div * gpmc_get_fclk_period()) / 1000, div); #endif |