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authorJin Park <jinyoungp@nvidia.com>2011-09-26 14:39:22 +0900
committerDan Willemsen <dwillemsen@nvidia.com>2013-09-14 01:05:55 -0700
commit20315a1eef81a6e1d77d808dfd9f0ea3f5005471 (patch)
tree5039b7f66e04b4a7189014f5959fd3bbec8b4160 /drivers/mfd/max77663-core.c
parentd72533bc9380e4af78ea38fd12808d9c5377814e (diff)
mfd: max77663: Add power off function
Bug 849360 Signed-off-by: Jin Park <jinyoungp@nvidia.com> Reviewed-on: http://git-master/r/54428 (cherry picked from commit 6c06d12f10bc221cde89f5a1738b9f003796dd45) Reviewed-on: http://git-master/r/55148 (cherry picked from commit 45466efa9c551cd2e5ee05d217a30a1c4342a7cd) Change-Id: Iad256cf4d6e21e963987df04bd30a1f563ae1d12 Reviewed-on: http://git-master/r/56355 Tested-by: Jinyoung Park <jinyoungp@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com> Rebase-Id: R2b513f87f2e21240821a0a2d05e9e1a861fcc7fb
Diffstat (limited to 'drivers/mfd/max77663-core.c')
-rw-r--r--drivers/mfd/max77663-core.c13
1 files changed, 13 insertions, 0 deletions
diff --git a/drivers/mfd/max77663-core.c b/drivers/mfd/max77663-core.c
index 4fd31a6b8350..b5120d23943c 100644
--- a/drivers/mfd/max77663-core.c
+++ b/drivers/mfd/max77663-core.c
@@ -57,6 +57,7 @@
#define MAX77663_REG_GPIO_PU 0x3E
#define MAX77663_REG_GPIO_PD 0x3F
#define MAX77663_REG_GPIO_ALT 0x40
+#define MAX77663_REG_ONOFF_CFG1 0x41
#define IRQ_TOP_GLBL_MASK (1 << 7)
#define IRQ_TOP_GLBL_SHIFT 7
@@ -111,6 +112,8 @@
#define GPIO_DBNC_16MS 2
#define GPIO_DBNC_32MS 3
+#define ONOFF_SFT_RST_MASK (1 << 7)
+
enum {
CACHE_IRQ_LBT,
CACHE_IRQ_SD,
@@ -350,6 +353,16 @@ int max77663_set_bits(struct device *dev, u8 addr, u8 mask, u8 value,
}
EXPORT_SYMBOL(max77663_set_bits);
+int max77663_power_off(void)
+{
+ struct max77663_chip *chip = max77663_chip;
+
+ dev_info(chip->dev, "%s: Global shutdown\n", __func__);
+ return max77663_set_bits(chip->dev, MAX77663_REG_ONOFF_CFG1,
+ ONOFF_SFT_RST_MASK, ONOFF_SFT_RST_MASK, 0);
+}
+EXPORT_SYMBOL(max77663_power_off);
+
static inline int max77663_cache_write(struct device *dev, u8 addr, u8 mask,
u8 val, u8 *cache)
{