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authorHaibo Chen <haibo.chen@freescale.com>2015-06-25 10:08:46 +0800
committerOctavian Purdila <octavian.purdila@nxp.com>2017-02-23 14:21:42 +0200
commit90576b746de5711d574fbbca91a076f0fa8cec54 (patch)
tree8dcf6622c11c35f5e5ea441aa1c8de56ec21357f /drivers/mmc/host/sdhci-esdhc-imx.c
parenta501f7727f100a6a29f1be561a4e80d3e01164f9 (diff)
MLK-11397 mmc: sdhci-esdhc-imx: move the setting of watermark level out of probe
Currently, we config the watermark_level register only in probe. This will cause the mmc write operation timeout issue after system resume back in LPSR mode. Because in LPSR mode, after system resume back, the watermark_level register(0x44) changes to 0x08000880, which set the write watermark level as 0, and set the read watermark level as 128. This value is incorrect. This patch move the setting of watermark level register out of probe, so after system resume back, mmc driver will set back this watermark level register back to 0x10401040. Signed-off-by: Haibo Chen <haibo.chen@freescale.com> (cherry picked from commit 05f72329a3c288e15c2f187305a21815d6bffc6d) Conflicts: drivers/mmc/host/sdhci-esdhc-imx.c
Diffstat (limited to 'drivers/mmc/host/sdhci-esdhc-imx.c')
-rw-r--r--drivers/mmc/host/sdhci-esdhc-imx.c7
1 files changed, 7 insertions, 0 deletions
diff --git a/drivers/mmc/host/sdhci-esdhc-imx.c b/drivers/mmc/host/sdhci-esdhc-imx.c
index 7123ef96ed18..957e380678c2 100644
--- a/drivers/mmc/host/sdhci-esdhc-imx.c
+++ b/drivers/mmc/host/sdhci-esdhc-imx.c
@@ -609,6 +609,13 @@ static void esdhc_writeb_le(struct sdhci_host *host, u8 val, int reg)
mask = 0xffff & ~(ESDHC_CTRL_BUSWIDTH_MASK | ESDHC_CTRL_D3CD);
esdhc_clrset_le(host, mask, new_val, reg);
+
+ /*
+ * The imx6q ROM code will change the default watermark
+ * level setting to something insane. Change it back here.
+ */
+ if (esdhc_is_usdhc(imx_data))
+ writel(0x10401040, host->ioaddr + ESDHC_WTMK_LVL);
return;
}
esdhc_clrset_le(host, 0xff, val, reg);