diff options
| author | Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> | 2014-10-21 11:22:40 +0200 |
|---|---|---|
| committer | Ulf Hansson <ulf.hansson@linaro.org> | 2014-11-10 12:40:47 +0100 |
| commit | 8afdc9cca27fc299ffe7b535b299adc03efab851 (patch) | |
| tree | 150b272df30630d62731c53cb0e9ad4ff430c72d /drivers/mmc/host/sdhci-pxav3.c | |
| parent | 01ae1070cbb5fbb3bffa0df44e422521df2b4ab1 (diff) | |
mmc: sdhci-pxav3: Get optional core clock
Besides the I/O clock, some PXAv3 SDHCI IP also requires a core clock to
be enabled. Add an optional core clock to the corresponding driver.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Diffstat (limited to 'drivers/mmc/host/sdhci-pxav3.c')
| -rw-r--r-- | drivers/mmc/host/sdhci-pxav3.c | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/drivers/mmc/host/sdhci-pxav3.c b/drivers/mmc/host/sdhci-pxav3.c index 3dfd97977515..ad0badad0ebc 100644 --- a/drivers/mmc/host/sdhci-pxav3.c +++ b/drivers/mmc/host/sdhci-pxav3.c @@ -59,6 +59,7 @@ #define SDCE_MISC_INT_EN (1<<1) struct sdhci_pxa { + struct clk *clk_core; struct clk *clk_io; u8 power_mode; }; @@ -320,6 +321,10 @@ static int sdhci_pxav3_probe(struct platform_device *pdev) pltfm_host->clk = pxa->clk_io; clk_prepare_enable(pxa->clk_io); + pxa->clk_core = devm_clk_get(dev, "core"); + if (!IS_ERR(pxa->clk_core)) + clk_prepare_enable(pxa->clk_core); + /* enable 1/8V DDR capable */ host->mmc->caps |= MMC_CAP_1_8V_DDR; @@ -392,6 +397,8 @@ err_add_host: err_of_parse: err_cd_req: clk_disable_unprepare(pxa->clk_io); + if (!IS_ERR(pxa->clk_core)) + clk_disable_unprepare(pxa->clk_core); err_clk_get: err_mbus_win: sdhci_pltfm_free(pdev); @@ -409,6 +416,8 @@ static int sdhci_pxav3_remove(struct platform_device *pdev) pm_runtime_disable(&pdev->dev); clk_disable_unprepare(pxa->clk_io); + if (!IS_ERR(pxa->clk_core)) + clk_disable_unprepare(pxa->clk_core); sdhci_pltfm_free(pdev); @@ -456,6 +465,8 @@ static int sdhci_pxav3_runtime_suspend(struct device *dev) spin_unlock_irqrestore(&host->lock, flags); clk_disable_unprepare(pxa->clk_io); + if (!IS_ERR(pxa->clk_core)) + clk_disable_unprepare(pxa->clk_core); return 0; } @@ -468,6 +479,8 @@ static int sdhci_pxav3_runtime_resume(struct device *dev) unsigned long flags; clk_prepare_enable(pxa->clk_io); + if (!IS_ERR(pxa->clk_core)) + clk_prepare_enable(pxa->clk_core); spin_lock_irqsave(&host->lock, flags); host->runtime_suspended = false; |