diff options
| author | Dong Aisheng <aisheng.dong@freescale.com> | 2015-12-14 15:31:43 +0800 |
|---|---|---|
| committer | Nitin Garg <nitin.garg@nxp.com> | 2016-01-14 11:02:44 -0600 |
| commit | 6df6f1b26eaaf709b0eacb6f0bc6366942baaae9 (patch) | |
| tree | 204756804fe4921cf340c342cfaf55b686872884 /drivers/mmc | |
| parent | e255eb7c6f1f855ebd6643add6df570c0a2783b4 (diff) | |
MLK-12000 mmc: sdhci-esdhci-imx: disable DLL delay line settings explicitly
Disable DLL delay line settings explicitly during driver initialization
in case ROM/uBoot had set an invalid delay.
e.g. MX6DL ROM has set the default delay line(DLLCTRL) to 0x1000021,
the uSDHC clock timing will become marginal when works on DDR mode
due to default delay and will possibly see CRC errors in cause the board
is not perfectly designed on the eMMC chip layout.
Signed-off-by: Dong Aisheng <aisheng.dong@freescale.com>
Diffstat (limited to 'drivers/mmc')
| -rw-r--r-- | drivers/mmc/host/sdhci-esdhc-imx.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/mmc/host/sdhci-esdhc-imx.c b/drivers/mmc/host/sdhci-esdhc-imx.c index 421deb05ef41..1b8b0597244a 100644 --- a/drivers/mmc/host/sdhci-esdhc-imx.c +++ b/drivers/mmc/host/sdhci-esdhc-imx.c @@ -1213,6 +1213,9 @@ static int sdhci_esdhc_imx_probe(struct platform_device *pdev) */ writel(readl(host->ioaddr + 0x6c) | BIT(7), host->ioaddr + 0x6c); + + /* disable DLL_CTRL delay line settings */ + writel(0x0, host->ioaddr + ESDHC_DLL_CTRL); } if (imx_data->socdata->flags & ESDHC_FLAG_MAN_TUNING) |