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authorJaehoon Chung <jh80.chung@samsung.com>2013-08-02 23:08:58 +0900
committerChris Ball <cjb@laptop.org>2013-08-29 21:17:15 -0400
commit7ef2a5e2f72325fd83c6e1ab76b139ca31c7f8ed (patch)
tree831d4750b293236eef2c42e0975af7b59cbc8ac7 /drivers/mmc
parent490104ac597b8b4c858a6a6889a60d8897181baf (diff)
mmc: sdhci-s3c: fix the wrong register value, when clock is disabled
When use the QUIRK_NONSTANDARD_CLOCK, then never set to 0 at clock control register. This patch fixes this problem. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Chris Ball <cjb@laptop.org>
Diffstat (limited to 'drivers/mmc')
-rw-r--r--drivers/mmc/host/sdhci-s3c.c7
1 files changed, 5 insertions, 2 deletions
diff --git a/drivers/mmc/host/sdhci-s3c.c b/drivers/mmc/host/sdhci-s3c.c
index 926aaf6acc67..1572b6a935b9 100644
--- a/drivers/mmc/host/sdhci-s3c.c
+++ b/drivers/mmc/host/sdhci-s3c.c
@@ -296,9 +296,12 @@ static void sdhci_cmu_set_clock(struct sdhci_host *host, unsigned int clock)
unsigned long timeout;
u16 clk = 0;
- /* don't bother if the clock is going off */
- if (clock == 0)
+ /* If the clock is going off, set to 0 at clock control register */
+ if (clock == 0) {
+ sdhci_writew(host, 0, SDHCI_CLOCK_CONTROL);
+ host->clock = clock;
return;
+ }
sdhci_s3c_set_clock(host, clock);