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authorRyan QIAN <b32804@freescale.com>2012-05-29 08:22:36 +0800
committerJason Liu <r64343@freescale.com>2012-07-20 13:38:22 +0800
commit9a9c9cb76d17b1d2cf26980d20999ea01d0df105 (patch)
treefc9b6ab4cae7ab236c5f24799696bde91f05085e /drivers/mmc
parent411a03f149802f26229c0fa8883bb5964fabcdcc (diff)
ENGR00211300: warning of 'mmc: unknown controller version' on boot.
Since SVN 0x11 defined in FSL host controller is mapping to SD host specification 3.0, it needs to remap the value while reading SDHCI_HOST_CTRL_VER. Signed-off-by: Ryan QIAN <b32804@freescale.com>
Diffstat (limited to 'drivers/mmc')
-rw-r--r--drivers/mmc/host/sdhci-esdhc-imx.c15
1 files changed, 12 insertions, 3 deletions
diff --git a/drivers/mmc/host/sdhci-esdhc-imx.c b/drivers/mmc/host/sdhci-esdhc-imx.c
index 00bfc85848dc..5169d8f74c65 100644
--- a/drivers/mmc/host/sdhci-esdhc-imx.c
+++ b/drivers/mmc/host/sdhci-esdhc-imx.c
@@ -68,6 +68,8 @@
#define SDHCI_PROT_CTRL_1BIT (0 << 1)
#define SDHCI_PROT_CTRL_LCTL (1 << 0)
+#define SDHCI_FSL_SVN_300 0x11
+
/*
* There is an INT DMA ERR mis-match between eSDHC and STD SDHC SPEC:
* Bit25 is used in STD SPEC, and is reserved in fsl eSDHC design,
@@ -269,10 +271,17 @@ static u16 esdhc_readw_le(struct sdhci_host *host, int reg)
struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
struct pltfm_imx_data *imx_data = pltfm_host->priv;
- if (unlikely(reg == SDHCI_HOST_VERSION))
- reg ^= 2;
-
switch (reg) {
+ case SDHCI_HOST_VERSION:
+ reg ^= 2;
+ val = readl(host->ioaddr + reg);
+ if (((val & SDHCI_SPEC_VER_MASK) >> SDHCI_SPEC_VER_SHIFT)
+ == SDHCI_FSL_SVN_300) {
+ val &= ~SDHCI_SPEC_VER_MASK;
+ val |= SDHCI_SPEC_300;
+ }
+ ret = 0xFFFF & val;
+ return ret;
case SDHCI_HOST_CONTROL2:
ret = 0;
/* collect bit info from several regs */