diff options
| author | Haibo Chen <haibo.chen@freescale.com> | 2015-03-19 14:38:27 +0800 |
|---|---|---|
| committer | Nitin Garg <nitin.garg@freescale.com> | 2015-09-17 09:22:06 -0500 |
| commit | 245373f092d2ec6cac8ef798fe3a4874a8258f6d (patch) | |
| tree | 264c9150074f568e5641868a2f4b9d7f11005ced /drivers/mmc | |
| parent | 73b1356fbab5e1d5cf0ee148e9c992e589e9bbca (diff) | |
MLK-10443 mmc: usdhc: imx7d: config watermater levles and burst lengths
i.MX7D support eMMC HS400 mode, this mode can run in 8 bit,200MHZ
DDR mode. So the I/O speed improve a lot compare to sd3.0.
The default burst length is 8, if we don't change this value, in
HS400 mode, when we do eMMC read operation, we can find that the
clock signal will stop for a period of time. This means the speed
of data moving on AHB bus is slower than I/O speed. So we should
improve the speed of data moving on AHB bus.
This patch set the burst length as 16, and set watermater levle as
64. The test result is the clock signal has no stop during the eMMC
HS400 operation.
Signed-off-by: Haibo Chen <haibo.chen@freescale.com>
Diffstat (limited to 'drivers/mmc')
| -rw-r--r-- | drivers/mmc/host/sdhci-esdhc-imx.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/mmc/host/sdhci-esdhc-imx.c b/drivers/mmc/host/sdhci-esdhc-imx.c index 1214e775dcf8..d82c45320d2c 100644 --- a/drivers/mmc/host/sdhci-esdhc-imx.c +++ b/drivers/mmc/host/sdhci-esdhc-imx.c @@ -1122,7 +1122,7 @@ static int sdhci_esdhc_imx_probe(struct platform_device *pdev) * to something insane. Change it back here. */ if (esdhc_is_usdhc(imx_data)) { - writel(0x08100810, host->ioaddr + ESDHC_WTMK_LVL); + writel(0x10401040, host->ioaddr + ESDHC_WTMK_LVL); host->quirks2 |= SDHCI_QUIRK2_PRESET_VALUE_BROKEN | SDHCI_QUIRK2_NOSTD_TIMEOUT_COUNTER; host->mmc->caps |= MMC_CAP_1_8V_DDR; |