diff options
| author | Ryan QIAN <b32804@freescale.com> | 2012-02-22 09:32:51 +0800 |
|---|---|---|
| committer | Zhang Jiejing <jiejing.zhang@freescale.com> | 2012-02-23 17:00:33 +0800 |
| commit | 0b2c3564239fae7332fc0d2c81723e247336a112 (patch) | |
| tree | 2fef418ec14a2d2ca9c2182ad77fa35a06e98ef2 /drivers/mmc | |
| parent | 822999502d2ce629d6f5a91c2aa8731c0c88c3d8 (diff) | |
ENGR00175080 [MX6] MMC: kernel failed to init eMMC card, after boot from eMMC
issue:
if uboot is loaded from eMMC, the eMMC memory will be configured to DDR mode.
on kernel startup, it will initialize the card at SDR mode, while the register
of USDHC is still configured to DDR enable mode. Therefore, the initialization
of eMMC memory will fail.
fix:
- clear MIX_CTRL on sdhc platform init code.
- clear vselect bit of VENDOR_SPEC on sdhc platform init code.
Signed-off-by: Ryan QIAN <b32804@freescale.com>
Diffstat (limited to 'drivers/mmc')
| -rw-r--r-- | drivers/mmc/host/sdhci-esdhc-imx.c | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/drivers/mmc/host/sdhci-esdhc-imx.c b/drivers/mmc/host/sdhci-esdhc-imx.c index fc9b25b5e48d..a7794df81d37 100644 --- a/drivers/mmc/host/sdhci-esdhc-imx.c +++ b/drivers/mmc/host/sdhci-esdhc-imx.c @@ -630,7 +630,10 @@ static int esdhc_pltfm_init(struct sdhci_host *host, struct sdhci_pltfm_data *pd host->clk_mgr_en = true; } - reg = readl(host->ioaddr + SDHCI_MIX_CTRL); + writel(0, host->ioaddr + SDHCI_MIX_CTRL); + reg = readl(host->ioaddr + SDHCI_VENDOR_SPEC); + reg &= ~SDHCI_VENDOR_SPEC_VSELECT; + writel(reg, host->ioaddr + SDHCI_VENDOR_SPEC); /* disable card interrupt enable bit, and clear status bit * the default value of this enable bit is 1, but it should * be 0 regarding to standard host controller spec 2.1.3. |