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authorLudovic Barre <ludovic.barre@st.com>2018-10-08 14:08:51 +0200
committerUlf Hansson <ulf.hansson@linaro.org>2018-10-09 09:13:04 +0200
commit15878e58461bbb4def541b72b835be410e1a9cf4 (patch)
tree0e442088ebdb9f53099616e8fc307ce7552f668e /drivers/mmc
parentc86a9888850e3f423e09610628fdcc84d30f6647 (diff)
mmc: mmci: add optional reset property
This patch adds a optional reset management. STM32 sdmmc variant needs to reset hardware block during the power cycle procedure (for re-initialization). Signed-off-by: Ludovic Barre <ludovic.barre@st.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Diffstat (limited to 'drivers/mmc')
-rw-r--r--drivers/mmc/host/mmci.c7
-rw-r--r--drivers/mmc/host/mmci.h2
2 files changed, 9 insertions, 0 deletions
diff --git a/drivers/mmc/host/mmci.c b/drivers/mmc/host/mmci.c
index 760759919f7f..d636a0e6aa9f 100644
--- a/drivers/mmc/host/mmci.c
+++ b/drivers/mmc/host/mmci.c
@@ -36,6 +36,7 @@
#include <linux/pm_runtime.h>
#include <linux/types.h>
#include <linux/pinctrl/consumer.h>
+#include <linux/reset.h>
#include <asm/div64.h>
#include <asm/io.h>
@@ -1882,6 +1883,12 @@ static int mmci_probe(struct amba_device *dev,
dev_dbg(mmc_dev(mmc), "clocking block at %u Hz\n", mmc->f_max);
+ host->rst = devm_reset_control_get_optional_exclusive(&dev->dev, NULL);
+ if (IS_ERR(host->rst)) {
+ ret = PTR_ERR(host->rst);
+ goto clk_disable;
+ }
+
/* Get regulators and the supported OCR mask */
ret = mmc_regulator_get_supply(mmc);
if (ret)
diff --git a/drivers/mmc/host/mmci.h b/drivers/mmc/host/mmci.h
index cdcadd29a10d..8ecb1eee001e 100644
--- a/drivers/mmc/host/mmci.h
+++ b/drivers/mmc/host/mmci.h
@@ -318,6 +318,8 @@ struct mmci_host {
struct clk *clk;
u8 singleirq:1;
+ struct reset_control *rst;
+
spinlock_t lock;
unsigned int mclk;