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authorCliff Cai <cliff.cai@analog.com>2009-05-26 06:24:14 -0400
committerDavid Woodhouse <David.Woodhouse@intel.com>2009-06-05 18:27:43 +0100
commitc3a9f35673290f49ec115d36ad283961c82c135a (patch)
tree07b08133e0bf0b53dff1c61b107e30bc911e5881 /drivers/mtd/nand/bf5xx_nand.c
parent530c3b60658687e2ad7bf98ef83631a8280ae8a6 (diff)
mtd: blackfin NFC: fix hang when using NAND on BF527-EZKITs
The DMAs have different bit sizes on BF52x and BF54x. From the PHRM: "The 16-bit DMA Access Bus (DAB) connects the DMA controller to the on-chip peripherals, PPI, SPI, Ethernet MAC, the SPORTs, NFC, HOSTDP and the UARTs." 32-bit DMA won't work for BF52x. Signed-off-by: Cliff Cai <cliff.cai@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org> Signed-off-by: Bryan Wu <cooloney@kernel.org> Signed-off-by: Artem Bityutskiy <Artem.Bityutskiy@nokia.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Diffstat (limited to 'drivers/mtd/nand/bf5xx_nand.c')
-rw-r--r--drivers/mtd/nand/bf5xx_nand.c13
1 files changed, 11 insertions, 2 deletions
diff --git a/drivers/mtd/nand/bf5xx_nand.c b/drivers/mtd/nand/bf5xx_nand.c
index 2ab42d2d4f91..8506e7e606fd 100644
--- a/drivers/mtd/nand/bf5xx_nand.c
+++ b/drivers/mtd/nand/bf5xx_nand.c
@@ -496,11 +496,20 @@ static void bf5xx_nand_dma_rw(struct mtd_info *mtd,
/* setup DMA register with Blackfin DMA API */
set_dma_config(CH_NFC, 0x0);
set_dma_start_addr(CH_NFC, (unsigned long) buf);
+
+/* The DMAs have different size on BF52x and BF54x */
+#ifdef CONFIG_BF52x
+ set_dma_x_count(CH_NFC, (page_size >> 1));
+ set_dma_x_modify(CH_NFC, 2);
+ val = DI_EN | WDSIZE_16;
+#endif
+
+#ifdef CONFIG_BF54x
set_dma_x_count(CH_NFC, (page_size >> 2));
set_dma_x_modify(CH_NFC, 4);
-
- /* setup write or read operation */
val = DI_EN | WDSIZE_32;
+#endif
+ /* setup write or read operation */
if (is_read)
val |= WNR;
set_dma_config(CH_NFC, val);